AVX-512 throughput improvement opportunties

[BruceForstall]

The PR to enable EVEX support by default introduced some JIT throughput regressions. The comments in that PR analyzed the cause of these regressions and identified possible follow-up investigations and improvements.

This issue tracks recovering some of the TP regressions by investigating the proposed improvements or mitigations.

For example, LSRA has a number of places with the following loop structure:

for (regNumber reg = REG_FIRST; reg < AVAILABLE_REG_COUNT; reg = REG_NEXT(reg))

and with AVX-512 available, there are an additional 16 SIMD registers and 8 opmask (k) registers, so these loops iterate more.

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Issue Details

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The PR to enable EVEX support by default introduced some JIT throughput regressions. The comments in that PR analyzed the cause of these regressions and identified possible follow-up investigations and improvements.

This issue tracks recovering some of the TP regressions by investigating the proposed improvements or mitigations.

For example, LSRA has a number of places with the following loop structure:

for (regNumber reg = REG_FIRST; reg < AVAILABLE_REG_COUNT; reg = REG_NEXT(reg))

and with AVX-512 available, there are an additional 16 SIMD registers and 8 opmask (k) registers, so these loops iterate more.

Author:	BruceForstall
Assignees:	-
Labels:	area-CodeGen-coreclr, arch-avx512
Milestone:	8.0.0

[BruceForstall]

Link: #83648

[kunalspathak]

Related #83109

[JulieLeeMSFT]

Assigning to @kunalspathak. Please feel free to reassign.

[kunalspathak]

possible follow-up investigations and improvements

The LSRA TP improvements mentioned in #83648 (comment) and #83648 (comment) are for improving the for loop over registers and is being done in #85744. Other TP improvements need to happen in impImportBlockCode () for example which I am not sure will happen in .NET 8. Once #85744 is merged, I will move this to Future.