Test CAN1 set_fifo_interrupt(false) behaviors

This commit corresponds to a FlexCAN PR review question in imxrt-hal.
I'm sharing it to make reproduction easier.

imxrt-rs/imxrt-hal#122 (comment)

Cargo.toml

@@ -53,9 +53,17 @@ path = "teensy4-fcb"
 version = "0.4"
 
 [dependencies.imxrt-hal]
+version = "0.4.2"
+features = ["imxrt1062"]
+
+[patch.crates-io.imxrt-hal]
 git = "https://github.com/dstric-aqueduct/imxrt-hal" 
 branch = "dev/can"
 
+[patch.crates-io.imxrt-iomuxc]
+git = "https://github.com/dstric-aqueduct/imxrt-iomuxc.git"
+tag = "v0.1.5-can"
+
 [dependencies.teensy4-pins]
 version = "0.2"
 path = "teensy4-pins"

examples/can.rs

@@ -2,8 +2,8 @@
 //!
 //! Pinout:
 //!
-//! - Teensy 4 Pin 22 (CAN1 TX) to TX pin of CAN Transceiver 
-//! - Teensy 4 Pin 23 (CAN2 RX) to RX pin of CAN Transceiver 
+//! - Teensy 4 Pin 22 (CAN1 TX) to TX pin of CAN Transceiver
+//! - Teensy 4 Pin 23 (CAN2 RX) to RX pin of CAN Transceiver
 //!
 //! A Can transceiver (such as the Texas Instruments SN65HVD230) is required for this demo.
 //!
@@ -46,22 +46,29 @@ fn main() -> ! {
     );
 
     let mut can1 = can1_builder.build(pins.p22, pins.p23);
-    
+
     can1.set_baud_rate(1_000_000);
     can1.set_max_mailbox(16);
     can1.enable_fifo();
-    can1.set_fifo_interrupt(true);
+    can1.set_fifo_interrupt(false);
     can1.set_fifo_accept_all();
     can1.print_registers();
 
     let id = bsp::hal::can::Id::from(bsp::hal::can::StandardId::new(0x00).unwrap());
     let data: [u8; 8] = [0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07];
     let frame = bsp::hal::can::Frame::new_data(id, data);
 
+    unsafe { cortex_m::peripheral::NVIC::unmask(bsp::interrupt::CAN1) };
     loop {
         systick.delay_ms(1000);
         led.toggle();
         can1.read_mailboxes();
         can1.transmit(&frame).ok();
     }
 }
+
+use bsp::interrupt;
+#[cortex_m_rt::interrupt]
+fn CAN1() {
+    log::warn!("CAN1 interrupt fired");
+}