ar71xx: ag71xx: start aneg on switch PHYs after reset

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30925 3c298f89-4303-0410-b956-a3cf2f4a3e73
dtaht · Mar 13, 2012 · 0fced5d · 0fced5d
1 parent 9d0c4ce
commit 0fced5d
Showing 1 changed file with 10 additions and 0 deletions.
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
@@ -596,6 +596,16 @@ static int ar7240sw_reset(struct ar7240sw *as)
 	ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
 				AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
 
+	/* setup PHYs */
+	for (i = 0; i < AR7240_NUM_PHYS; i++) {
+		ar7240sw_phy_write(mii, i, MII_ADVERTISE,
+				   ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
+				   ADVERTISE_PAUSE_ASYM);
+		ar7240sw_phy_write(mii, i, MII_BMCR,
+				   BMCR_RESET | BMCR_ANENABLE);
+	}
+	msleep(1000);
+
 	ar7240sw_setup(as);
 	return ret;
 }