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ar71xx: improve SPI flash read/write performance
mtd_speedtest results: page write speed old new delta DB120 209 KiB/s 226 KiB/s +8.13% TL-WR1043ND v1 122 KiB/s 148 KiB/s +21.31% TL-WR703N v1 153 KiB/s 194 KiB/s +26.80% TL-MR3220 v1 130 KiB/s 156 KiB/s +20.00% TL-WR2543ND v1 158 KiB/s 202 KiB/s +27.85% TL-WR741ND v2 122 KiB/s 152 KiB/s +24.59% ALFA AP96 229 KiB/s 260 KiB/s +13.54% WNDR3700 202 KiB/s 223 KiB/s +10.40% page read speed old new delta DB120 691 KiB/s 929 KiB/s +34.44% TL-WR1043ND v1 372 KiB/s 754 KiB/s +102.69% TL-WR703N v1 375 KiB/s 745 KiB/s +98.67% TL-MR3220 v1 372 KiB/s 752 KiB/s +102.15% TL-WR2543ND v1 307 KiB/s 564 KiB/s +83.71% TL-WR741ND v2 315 KiB/s 525 KiB/s +66.67% ALFA AP96 515 KiB/s 702 KiB/s +36.31% WNDR3700 515 KiB/s 697 KiB/s +35.34% git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31117 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Mar 27, 2012
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15 changes: 8 additions & 7 deletions
15
target/linux/ar71xx/patches-3.2/202-spi-ath79-add-missing-HIGH-LOW-SCK-transition.patch
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,20 +1,21 @@ | ||
From 0ad8cbbb978bc01de08eadd3357ea188302b83ce Mon Sep 17 00:00:00 2001 | ||
From ea7e40aedae58b7a0f0ccd8658063de499734874 Mon Sep 17 00:00:00 2001 | ||
From: Gabor Juhos <juhosg@openwrt.org> | ||
Date: Wed, 11 Jan 2012 20:33:41 +0100 | ||
Subject: [PATCH 2/7] spi/ath79: add missing HIGH->LOW SCK transition | ||
|
||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> | ||
--- | ||
drivers/spi/spi-ath79.c | 1 + | ||
1 files changed, 1 insertions(+), 0 deletions(-) | ||
drivers/spi/spi-ath79.c | 2 ++ | ||
1 files changed, 2 insertions(+), 0 deletions(-) | ||
|
||
--- a/drivers/spi/spi-ath79.c | ||
+++ b/drivers/spi/spi-ath79.c | ||
@@ -193,6 +193,7 @@ static u32 ath79_spi_txrx_mode0(struct s | ||
ath79_spi_delay(nsecs); | ||
@@ -200,6 +200,8 @@ static u32 ath79_spi_txrx_mode0(struct s | ||
ath79_spi_delay(sp, nsecs); | ||
ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK); | ||
ath79_spi_delay(nsecs); | ||
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); | ||
ath79_spi_delay(sp, nsecs); | ||
+ if (bits == 1) | ||
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); | ||
|
||
word <<= 1; | ||
} |
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