This is a collection of risc-v examples using a specific implementation.

https://github.com/cliffordwolf/picorv32

Also using

apt-get install verilator

I prefer from sources

http://www.veripool.org/wiki/verilator

same goes for gtkwave

http://gtkwave.sourceforge.net/

I think I have had some issues recently with the apt-got gtkwave so I
build that from sources too.  YMMV.

You may not need gtkwave, it is very cool to see the sim running but I
expect I will make a sim that just prints stuff to the console and wont
need waveforms except for debugging.

A toolchain, directly lifted from the picorv32 readme.

    # Ubuntu packages needed:
    sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev \
            libgmp-dev gawk build-essential bison flex texinfo gperf

    sudo mkdir /opt/riscv32i
    sudo chown $USER /opt/riscv32i

    git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
    cd riscv-gnu-toolchain-rv32i
    git checkout 13f52d2

    mkdir build; cd build
    ../configure --with-arch=RV32I --prefix=/opt/riscv32i
    make -j$(nproc)

I find these disturbing and just wrong:

const char * const riscv_gpr_names_abi[NGPR] = {
  "zero", "ra", "sp",  "gp",  "tp", "t0",  "t1",  "t2",
  "s0",   "s1", "a0",  "a1",  "a2", "a3",  "a4",  "a5",
  "a6",   "a7", "s2",  "s3",  "s4", "s5",  "s6",  "s7",
  "s8",   "s9", "s10", "s11", "t3", "t4",  "t5",  "t6"
};

So that I dont have to see them

Before running make

../binutils/opcodes/riscv-dis.c 50 lines in give or take change the
abi to numeric.  There is no floating point here so the floating point
registers dont really matter.

static void
set_default_riscv_dis_options (void)
{
  riscv_gpr_names = riscv_gpr_names_numeric;
  riscv_fpr_names = riscv_fpr_names_numeric;
  no_aliases = 0;
}



If in the picorv32 directory you use the normal Makefile it will generate
a sim that runs forever or until it hits a trap (for example executing
the machine code instruction 0xFFFFFFFF).

If you use Makefile.vcd then it will run some number of ticks defined
in the file or a trap but will generate dut.vcd.

An srecord with S3 records is required, it is the program to be run.

For example with the above toolchain if you build the simulator (verilator)
then go to the counter directory and build that (riscv32 toolchain
above). And run the simulator using the srec

../picorv32/obj_dir/Vptb notmain.srec

It prints out the program that it read then after the dashes is the
output.  Writing two 0xD0000000 generates a dump of that value in hex
to the console.


00000000 : 0x014000EF
00000004 : 0x00002137
00000008 : 0xFFFFFFFF
0000000C : 0x0000006F
00000010 : 0x000000F7
00000010 : 0x00008067
00000014 : 0xFF010113
00000018 : 0x00500513
0000001C : 0x00112623
00000020 : 0x0000001D
00000020 : 0xFF1FF0EF
00000024 : 0x00000793
00000028 : 0xD00006B7
0000002C : 0x00A00713
00000030 : 0x000000EC
00000030 : 0x00F6A023
00000034 : 0x00178793
00000038 : 0xFEE79CE3
0000003C : 0x00C12083
00000040 : 0x00000008
00000040 : 0x00000513
00000044 : 0x01010113
00000048 : 0x00008067
0000004C : 0x00C12099
------------
00000000
00000001
00000002
00000003
00000004
00000005
00000006
00000007
00000008
00000009
trap

An undefined instruction is placed to cause a trap to end the program

    jal notmain
    .word 0xFFFFFFFF
    j .