Make cmovnge an alias of cmovl

dyninst · Nov 28, 2023 · 3340079 · 3340079
1 parent 28b31c4
commit 3340079
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Showing 3 changed files with 7 additions and 6 deletions.
diff --git a/common/h/mnemonics/x86_entryIDs.h b/common/h/mnemonics/x86_entryIDs.h
@@ -77,10 +77,11 @@ e_cmovb,
 e_cmovnae = e_cmovb,
 e_cmovbe,
 e_cmove,
-e_cmovne,
+e_cmovl,
+e_cmovnge = e_cmovl,
 e_cmovle,
 e_cmovng = e_cmovle,
-e_cmovnge,
+e_cmovne,
 e_cmovnl,
 e_cmovno,
 e_cmovns,

diff --git a/common/src/arch-x86.C b/common/src/arch-x86.C
@@ -921,7 +921,7 @@ COMMON_EXPORT dyn_hash_map<entryID, std::string> entryNames_IAPI = map_list_of
   (e_cmova, "cmova")
   (e_cmovne, "cmovne")
   (e_cmovle, "cmovle")
-  (e_cmovnge, "cmovnge")
+  (e_cmovl, "cmovl")
   (e_cmovnl, "cmovnl")
   (e_cmovno, "cmovno")
   (e_cmovns, "cmovns")
@@ -2070,7 +2070,7 @@ void ia32_instruction::initFlagTable(dyn_hash_map<entryID, flagInfo>& flagTable_
   flagTable_[e_cmova] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovne] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovle] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
-  flagTable_[e_cmovnge] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
+  flagTable_[e_cmovl] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovnl] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovno] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovns] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
@@ -2618,7 +2618,7 @@ static ia32_entry twoByteMap[256] = {
   { e_cmovns,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX4A, false, { Zz, Zz, Zz }, 0, 0, 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX4B, false, { Zz, Zz, Zz }, 0, 0, 0 },
-  { e_cmovnge, t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
+  { e_cmovl, t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_cmovnl,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_cmovle,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_cmovnl,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },

diff --git a/dataflowAPI/src/convertOpcodes.C b/dataflowAPI/src/convertOpcodes.C
@@ -256,7 +256,7 @@ X86InstructionKind RoseInsnX86Factory::convertKind(entryID opcode, prefixEntryID
             return x86_cmovne;
         case e_cmovle:
             return x86_cmovle;
-        case e_cmovnge:
+        case e_cmovl:
             return x86_cmovl;
         case e_cmovnl:
             return x86_cmovge;