Merge branch 'VEX' of github.com:dyninst/dyninst

dyninst · Jun 13, 2016 · 50d65e9 · 50d65e9
2 parents e6adc0d + f2ceff0
commit 50d65e9
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Showing 3 changed files with 35 additions and 7 deletions.
diff --git a/common/h/entryIDs.h b/common/h/entryIDs.h
@@ -796,6 +796,7 @@ enum entryID {
   e_vmovsd,
   e_vmovshdup,
   e_vmovsldup,
+  e_movslq,
   e_vmovss,
   e_vmovupd,
   e_vmovups,

diff --git a/common/src/arch-x86.C b/common/src/arch-x86.C
@@ -498,9 +498,14 @@ enum {
     GrpD8=0, GrpD9, GrpDA, GrpDB, GrpDC, GrpDD, GrpDE, GrpDF
 };
 
-// VEX tables
+// VEX table
 enum {
-  VEXL00=0
+    VEXL00=0
+};
+
+// REX table
+enum {
+    REX00=0
 };
 
 /* Vex instructions that need extra decoding with the W bit */
@@ -1010,6 +1015,7 @@ COMMON_EXPORT dyn_hash_map<entryID, std::string> entryNames_IAPI = map_list_of
   (e_movsd_sse, "movsd")
   (e_movshdup, "movshdup")
   (e_movsldup, "movsldup")
+  (e_movslq, "movslq")
   (e_movss, "movss")
   (e_movsw, "movsw")
   (e_movsx, "movsx")
@@ -2182,8 +2188,8 @@ true, { Eb, Gb, Zz }, 0, s1RW2R },
   /* 60 */
   { e_pushad, t_done, 0, false, { GPRS, eSP, Zz }, 0, s1R2RW },
   { e_popad,  t_done, 0, false, { GPRS, eSP, Zz }, 0, s1W2RW },
-  { e_bound,    t_done, 0, true, { Gv, Ma, Zz }, 0, s1R2R }, // or VEX
-  { e_arpl,     t_done, 0, true, { Ew, Gw, Zz }, 0, s1R2R },
+  { e_bound, t_done, 0, true, { Gv, Ma, Zz }, 0, s1R2R }, // or VEX
+  { e_arpl,  t_done, 0, true, { Ew, Gw, Zz }, 0, s1R2R },
   { e_No_Entry,          t_ill,  0, false, { Zz, Zz, Zz }, 0, 0 }, // PREFIX_SEG_OVR
   { e_No_Entry,          t_ill,  0, false, { Zz, Zz, Zz }, 0, 0 }, // PREFIX_SEG_OVR
   { e_No_Entry,          t_ill,  2, false, { Zz, Zz, Zz }, 0, 0 }, /* operand size prefix (PREFIX_OPR_SZ) (depricated: prefixedSSE)*/
@@ -6378,8 +6384,8 @@ ia32_entry sseMapMult[][3] =
     { e_kmovq, t_done, 0, true, { Vps, Hps, Wps }, 0, s1W2R3R },
     { e_No_Entry, t_ill, 0, false, { Zz, Zz, Zz }, 0, 0 }
   }, { /* SSE92_NO */
-    { e_kmovw, t_done, 0, true, { Vps, Ev, Zz }, 0, s1W2R },
-    { e_kmovq, t_done, 0, true, { Vps, Ev, Zz }, 0, s1W2R },
+    { e_kmovw, t_done, 0, true, { VK, Ev, Zz }, 0, s1W2R },
+    { e_kmovq, t_done, 0, true, { VK, Ev, Zz }, 0, s1W2R },
     { e_No_Entry, t_ill, 0, false, { Zz, Zz, Zz }, 0, 0 }
   }, { /* SSE93_66 */
     { e_kmovb, t_done, 0, true, { Vps, Hps, Wps }, 0, s1W2R3R },
@@ -7619,6 +7625,14 @@ static struct ia32_entry vex2Map[][2] =
     }
 };
 
+static struct ia32_entry rexMap[][2] =
+{
+    {
+        { e_arpl, t_done, 0, true, { Ew, Gw, Zz }, 0, s1R2R }, /* No REX */
+        { e_movslq, t_done, 0, true, { Ev, Gv, Zz }, 0, s1RW2R } /* HAS REX */
+    }
+};
+
 /**
  * VEX (3 byte) prefixed instructions
  *
@@ -8657,6 +8671,18 @@ ia32_instruction& ia32_decode(unsigned int capa, const unsigned char* addr, ia32
                 nxtab = gotit->otable;
                 break;
 
+            case t_rex:
+                /* Does this instruction have a REX prefix? */
+                if(pref.getPrefix(4))
+                {
+                    gotit = &rexMap[idx][1];
+                } else {
+                    gotit = &rexMap[idx][0];
+                }
+
+                nxtab = gotit->otable;
+                break;
+
             case t_ill:
 #ifdef VEX_DEBUG
                 if(pref.vex_present)

diff --git a/common/src/arch-x86.h b/common/src/arch-x86.h
@@ -602,7 +602,8 @@ enum { op_a=1, op_b, op_c, op_d, op_dq, op_p, op_pd, op_pi, op_ps, op_q, // 10
 enum {
   t_ill=0, t_oneB, t_twoB, t_threeB, t_threeB2, t_prefixedSSE, t_coprocEsc, 
   t_grp, t_sse, t_sse_mult, t_sse_bis, t_sse_bis_mult, 
-  t_sse_ter, t_sse_ter_mult, t_grpsse, t_3dnow, t_vexl, t_vexw, t_sse_vex_mult, t_done=99
+  t_sse_ter, t_sse_ter_mult, t_grpsse, t_3dnow, t_vexl, t_vexw, t_sse_vex_mult, 
+  t_rex, t_done=99
 };
 
 // registers used for memory access