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Merge, fix test4_3, fix examples build
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@wrwilliams
wrwilliams committed Apr 16, 2018
2 parents 877cfc5 + 34c5f58 commit 5d1ee6d
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Showing 62 changed files with 5,914 additions and 308 deletions.
30 changes: 28 additions & 2 deletions common/h/dyn_regs.h
View file
Expand Up @@ -55,8 +55,9 @@ namespace Dyninst
Arch_x86_64 = 0x18000000,
Arch_ppc32 = 0x24000000,
Arch_ppc64 = 0x28000000,
Arch_aarch32 = 0x44000000, //for later use
Arch_aarch64 = 0x48000000
Arch_aarch32 = 0x44000000, //for later use
Arch_aarch64 = 0x48000000,
Arch_cuda = 0x88000000
} Architecture;


Expand Down Expand Up @@ -814,12 +815,32 @@ namespace Dyninst
DEF_REGISTER(xer, 1 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(lr, 8 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(ctr, 9 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(amr, 13 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(dscr, 17 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(dsisr, 18 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(dar, 19 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(dec, 22 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(sdr1, 25 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(srr0, 26 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(srr1, 27 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(cfar, 28 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(amr_pri, 29 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(pid, 48 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(gdecar, 53 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(decar, 54 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(mcivpr, 55 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(lper, 56 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(lperu, 57 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(csrr0, 58 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(csrr1, 59 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(gtsrwr, 60 | SPR | Arch_ppc32, "ppc32");
// DEF_REGISTER(iamr, 61 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(esr, 62 | SPR | Arch_ppc32, "ppc32");
// DEF_REGISTER(ivpr, 66 | SPR | Arch_ppc32, "ppc32");

DEF_REGISTER(vrsave, 256 | SPR | Arch_ppc32, "ppc32");


DEF_REGISTER(sprg0, 272 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(sprg1, 273 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(sprg2, 274 | SPR | Arch_ppc32, "ppc32");
Expand Down Expand Up @@ -922,6 +943,8 @@ namespace Dyninst
DEF_REGISTER(cr7g, 729 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(cr7e, 730 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(cr7s, 731 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(ppr, 896 | SPR | Arch_ppc32, "ppc32");
DEF_REGISTER(ppr32, 898 | SPR | Arch_ppc32, "ppc32");


}
Expand Down Expand Up @@ -1037,6 +1060,7 @@ namespace Dyninst
DEF_REGISTER(sdr1, 25 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(srr0, 26 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(srr1, 27 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(vrsave, 256 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(sprg0, 272 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(sprg1, 273 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(sprg2, 274 | SPR | Arch_ppc64, "ppc64");
Expand Down Expand Up @@ -1137,6 +1161,8 @@ namespace Dyninst
DEF_REGISTER(cr7g, 729 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(cr7e, 730 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(cr7s, 731 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(ppr, 896 | SPR | Arch_ppc64, "ppc64");
DEF_REGISTER(ppr32, 898 | SPR | Arch_ppc64, "ppc64");


}
Expand Down
4 changes: 4 additions & 0 deletions common/h/entryIDs.h
View file
Expand Up @@ -1649,6 +1649,10 @@ enum entryID {
power_op_fsneg,
power_op_fsnabs,
power_op_lwa,
power_op_popcntb,
power_op_popcntw,
power_op_popcntd,
power_op_wait,

// ***********
// Steve note:
Expand Down
14 changes: 14 additions & 0 deletions common/src/dyn_regs.C
View file
Expand Up @@ -85,6 +85,8 @@ MachRegister MachRegister::getBaseRegister() const {
case Arch_ppc64:
case Arch_none:
return *this;
case Arch_cuda:
assert(0);
case Arch_aarch32:
case Arch_aarch64:
//not verified
Expand Down Expand Up @@ -185,6 +187,7 @@ unsigned int MachRegister::size() const {
return 16;
return 8;
case Arch_aarch32:
case Arch_cuda:
assert(0);
case Arch_aarch64:
if((reg & 0x00ff0000) == aarch64::FPR)
Expand Down Expand Up @@ -251,6 +254,7 @@ MachRegister MachRegister::getPC(Dyninst::Architecture arch)
case Arch_aarch64: //aarch64: pc is not writable
return aarch64::pc;
case Arch_aarch32:
case Arch_cuda:
assert(0);
case Arch_none:
return InvalidReg;
Expand All @@ -274,6 +278,7 @@ MachRegister MachRegister::getReturnAddress(Dyninst::Architecture arch)
case Arch_aarch64: //aarch64: x30 stores the RA for current frame
return aarch64::x30;
case Arch_aarch32:
case Arch_cuda:
assert(0);
case Arch_none:
return InvalidReg;
Expand Down Expand Up @@ -319,6 +324,7 @@ MachRegister MachRegister::getStackPointer(Dyninst::Architecture arch)
case Arch_aarch64:
return aarch64::sp; //aarch64: stack pointer is an independent register
case Arch_aarch32:
case Arch_cuda:
assert(0);
case Arch_none:
return InvalidReg;
Expand All @@ -344,6 +350,7 @@ MachRegister MachRegister::getSyscallNumberReg(Dyninst::Architecture arch)
case Arch_aarch64:
return aarch64::x8;
case Arch_aarch32:
case Arch_cuda:
assert(0);
case Arch_none:
return InvalidReg;
Expand Down Expand Up @@ -437,6 +444,8 @@ MachRegister MachRegister::getZeroFlag(Dyninst::Architecture arch)
return ppc32::cr0e;
case Arch_ppc64:
return ppc64::cr0e;
case Arch_cuda:
assert(0);
case Arch_none:
return InvalidReg;
default:
Expand Down Expand Up @@ -1502,6 +1511,10 @@ MachRegister MachRegister::DwarfEncToReg(int encoding, Dyninst::Architecture arc
}
return Dyninst::InvalidReg;
}
case Arch_cuda:
// ignore CUDA register encodings for now
return Dyninst::InvalidReg;
break;
case Arch_none:
return Dyninst::InvalidReg;
break;
Expand Down Expand Up @@ -1948,6 +1961,7 @@ unsigned Dyninst::getArchAddressWidth(Dyninst::Architecture arch)
case Arch_x86_64:
case Arch_ppc64:
case Arch_aarch64:
case Arch_cuda:
return 8;
default:
assert(0);
Expand Down
1 change: 1 addition & 0 deletions dataflowAPI/rose/semantics/DispatcherPowerpc.C
View file
Expand Up @@ -1042,6 +1042,7 @@ DispatcherPowerpc::iproc_init()
iproc_set(powerpc_fmr, new Powerpc::IP_move);
iproc_set(powerpc_divw, new Powerpc::IP_divw);
iproc_set(powerpc_divwu, new Powerpc::IP_divwu);
iproc_set(powerpc_extsw, new Powerpc::IP_move);
iproc_set(powerpc_lbz, new Powerpc::IP_lbz);
iproc_set(powerpc_lbzu, new Powerpc::IP_lbzu);
iproc_set(powerpc_lbzux, new Powerpc::IP_lbzu);
Expand Down
4 changes: 0 additions & 4 deletions dataflowAPI/src/liveness.C
View file
Expand Up @@ -444,7 +444,6 @@ ReadWriteInfo LivenessAnalyzer::calcRWSets(Instruction curInsn, Block *blk, Addr
if (cur.getArchitecture() == Arch_ppc64)
cur = MachRegister((cur.val() & ~Arch_ppc64) | Arch_ppc32);
liveness_printf("\t%s \n", cur.name().c_str());
#if defined(x86_64) || defined(x86)
MachRegister base = cur.getBaseRegister();
if (cur == x86::flags || cur == x86_64::flags){
if (width == 4){
Expand Down Expand Up @@ -476,7 +475,6 @@ ReadWriteInfo LivenessAnalyzer::calcRWSets(Instruction curInsn, Block *blk, Addr
assert(index >= 0);
ret.read[index] = true;
}
#endif
}
liveness_printf("Write Registers: \n");
for (std::set<RegisterAST::Ptr>::const_iterator i = cur_written.begin();
Expand All @@ -485,7 +483,6 @@ ReadWriteInfo LivenessAnalyzer::calcRWSets(Instruction curInsn, Block *blk, Addr
if (cur.getArchitecture() == Arch_ppc64)
cur = MachRegister((cur.val() & ~Arch_ppc64) | Arch_ppc32);
liveness_printf("\t%s \n", cur.name().c_str());
#if defined(x86_64) || defined(x86)
MachRegister base = cur.getBaseRegister();
if (cur == x86::flags || cur == x86_64::flags){
if (width == 4){
Expand Down Expand Up @@ -518,7 +515,6 @@ ReadWriteInfo LivenessAnalyzer::calcRWSets(Instruction curInsn, Block *blk, Addr
ret.written[index] = true;
if ((cur != base && cur.size() < 4) || isMMX(base)) ret.read[index] = true;
}
#endif
}
InsnCategory category = curInsn.getCategory();
switch(category)
Expand Down
13 changes: 5 additions & 8 deletions dwarf/src/dwarfFrameParser.C
View file
Expand Up @@ -159,7 +159,7 @@ bool DwarfFrameParser::getRegsForFunction(
FrameErrors_t &err_result)
{
locs.clear();
dwarf_printf("Entry to getRegsForFunction at 0x%lx, reg %s\n", range.first, reg.name().c_str());
dwarf_printf("Entry to getRegsForFunction at 0x%lx, range end 0x%lx, reg %s\n", range.first, range.second, reg.name().c_str());
err_result = FE_No_Error;

/**
Expand All @@ -180,22 +180,19 @@ bool DwarfFrameParser::getRegsForFunction(
{
Dwarf_Frame * frame = NULL;
int result = dwarf_cfi_addrframe(cfi_data[i], next_pc, &frame);
if(result==-1) return false;
if(result==-1) break;

Dwarf_Addr start_pc, end_pc;
dwarf_frame_info(frame, &start_pc, &end_pc, NULL);

Dwarf_Op * ops;
size_t nops;
result = dwarf_frame_cfa(frame, &ops, &nops);
if (result != 0) return false;
if (result != 0) break;

VariableLocation loc2;
DwarfDyninst::SymbolicDwarfResult cons(loc2, arch);
if (!DwarfDyninst::decodeDwarfExpression(ops, nops, NULL, cons, arch)) {
//dwarf_printf("\t Failed to decode dwarf expr, ret false\n");
return false;
}
if (!DwarfDyninst::decodeDwarfExpression(ops, nops, NULL, cons, arch)) break;
loc2.lowPC = next_pc;
loc2.hiPC = end_pc;

Expand All @@ -204,7 +201,7 @@ bool DwarfFrameParser::getRegsForFunction(
}
}

return true;
return !locs.empty();
}

bool DwarfFrameParser::getRegAtFrame(
Expand Down
3 changes: 3 additions & 0 deletions dwarf/src/dwarfHandle.C
View file
Expand Up @@ -159,6 +159,9 @@ bool DwarfHandle::init_dbg()
case EM_AARCH64:
arch = Arch_aarch64;
break;
case EM_CUDA:
arch = Arch_cuda;
break;
default:
assert(0 && "Unsupported archiecture in ELF file.");
return false;
Expand Down
4 changes: 3 additions & 1 deletion dyninstAPI/src/Relocation/Transformers/Movement-analysis.C
View file
Expand Up @@ -438,7 +438,9 @@ bool PCSensitiveTransformer::insnIsThunkCall(Instruction insn,
Address addr,
Absloc &destination) {
// Should be able to handle this much more efficiently by following the CFG

if (insn->getCategory() != c_CallInsn) {
return false;
}
Expression::Ptr CFT = insn.getControlFlowTarget();
if (!CFT) {
return false;
Expand Down
5 changes: 5 additions & 0 deletions dyninstAPI/src/syscallNotification.C
View file
Expand Up @@ -91,6 +91,7 @@ bool syscallNotification::installPreFork() {
instReqs.push_back(preForkInst);

proc->installInstrRequests(instReqs);
proc->trapMapping.flush();

return true;
}
Expand All @@ -111,6 +112,7 @@ bool syscallNotification::installPostFork() {
instReqs.push_back(postForkInst);

proc->installInstrRequests(instReqs);
proc->trapMapping.flush();

return true;
}
Expand All @@ -129,6 +131,8 @@ bool syscallNotification::installPreExec() {
instReqs.push_back(preExecInst);

proc->installInstrRequests(instReqs);
proc->trapMapping.flush();

return true;
}

Expand Down Expand Up @@ -156,6 +160,7 @@ bool syscallNotification::installPreExit() {
instReqs.push_back(preExitInst);

proc->installInstrRequests(instReqs);
proc->trapMapping.flush();

return true;
}
Expand Down
4 changes: 4 additions & 0 deletions elf/h/Elf_X.h
View file
Expand Up @@ -38,6 +38,10 @@
#include "util.h"
#include "dyn_regs.h"

#ifndef EM_CUDA
#define EM_CUDA 190 /* NVIDIA CUDA */
#endif

namespace Dyninst {

// Forward declarations
Expand Down
2 changes: 2 additions & 0 deletions elf/src/Elf_X.C
View file
Expand Up @@ -1773,6 +1773,8 @@ Dyninst::Architecture Elf_X::getArch() const
case EM_K10M:
case EM_L10M:
return Dyninst::Arch_x86_64;
case EM_CUDA:
return Dyninst::Arch_cuda;
case EM_ARM:
return Dyninst::Arch_aarch32;
case EM_AARCH64:
Expand Down
24 changes: 22 additions & 2 deletions examples/CMakeLists.txt
View file
@@ -1,14 +1,34 @@


#add_executable(unstrip)
add_executable(unstrip unstrip/unstrip.C
unstrip/util.C
unstrip/types.C
unstrip/semanticDescriptor.C
unstrip/database.C
unstrip/fingerprint.C
unstrip/callback.C)
add_dependencies(unstrip parseAPI symtabAPI instructionAPI common)
target_link_libraries(unstrip parseAPI symtabAPI instructionAPI common)
file(COPY unstrip/ddb.db DESTINATION ${INSTALL_BIN_DIR})
file(COPY unstrip/params.db DESTINATION ${INSTALL_BIN_DIR})
file(COPY unstrip/unistd.db DESTINATION ${INSTALL_BIN_DIR})

add_executable(codeCoverage codeCoverage/codeCoverage.C)
add_dependencies(codeCoverage dyninstAPI patchAPI parseAPI symtabAPI instructionAPI pcontrol common)
target_link_libraries(codeCoverage dyninstAPI patchAPI parseAPI symtabAPI instructionAPI pcontrol common)

add_library(Inst SHARED codeCoverage/libInst.C)

add_executable(cfg_to_dot ../parseAPI/doc/example.cc)
add_dependencies(cfg_to_dot parseAPI symtabAPI)
target_link_libraries(cfg_to_dot parseAPI symtabAPI
)
#add_executable(retee)

install (TARGETS cfg_to_dot
install (TARGETS cfg_to_dot unstrip codeCoverage Inst
RUNTIME DESTINATION ${INSTALL_BIN_DIR}
LIBRARY DESTINATION ${INSTALL_LIB_DIR}
ARCHIVE DESTINATION ${INSTALL_LIB_DIR}
PUBLIC_HEADER DESTINATION ${INSTALL_INCLUDE_DIR})


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