Make cmovnb an alias of cmovae

dyninst · Nov 28, 2023 · 6abe618 · 6abe618
1 parent ddad53b
commit 6abe618
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Showing 3 changed files with 6 additions and 5 deletions.
diff --git a/common/h/mnemonics/x86_entryIDs.h b/common/h/mnemonics/x86_entryIDs.h
@@ -71,10 +71,11 @@ e_clwb,
 e_cmc,
 e_cmova,
 e_cmovnbe = e_cmova,
+e_cmovae,
+e_cmovnb = e_cmovae,
 e_cmovbe,
 e_cmove,
 e_cmovnae,
-e_cmovnb,
 e_cmovne,
 e_cmovng,
 e_cmovnge,

diff --git a/common/src/arch-x86.C b/common/src/arch-x86.C
@@ -917,7 +917,7 @@ COMMON_EXPORT dyn_hash_map<entryID, std::string> entryNames_IAPI = map_list_of
   (e_cmovbe, "cmovbe")
   (e_cmove, "cmove")
   (e_cmovnae, "cmovnae")
-  (e_cmovnb, "cmovnb")
+  (e_cmovae, "cmovae")
   (e_cmova, "cmova")
   (e_cmovne, "cmovne")
   (e_cmovng, "cmovng")
@@ -2066,7 +2066,7 @@ void ia32_instruction::initFlagTable(dyn_hash_map<entryID, flagInfo>& flagTable_
   flagTable_[e_cmovbe] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmove] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovnae] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
-  flagTable_[e_cmovnb] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
+  flagTable_[e_cmovae] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmova] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovne] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovng] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
@@ -2608,7 +2608,7 @@ static ia32_entry twoByteMap[256] = {
   { e_cmovo,   t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX41, false, { Zz, Zz, Zz }, 0, 0, 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX42, false, { Zz, Zz, Zz }, 0, 0, 0 },
-  { e_cmovnb,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
+  { e_cmovae,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX44, false, { Zz, Zz, Zz }, 0, 0, 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX45, false, { Zz, Zz, Zz }, 0, 0, 0 },
   { e_No_Entry,  t_sse_vex_mult, SSEVEX46, false, { Zz, Zz, Zz }, 0, 0, 0 },

diff --git a/dataflowAPI/src/convertOpcodes.C b/dataflowAPI/src/convertOpcodes.C
@@ -248,7 +248,7 @@ X86InstructionKind RoseInsnX86Factory::convertKind(entryID opcode, prefixEntryID
             return x86_cmove;
         case e_cmovnae:
             return x86_cmovb;
-        case e_cmovnb:
+        case e_cmovae:
             return x86_cmovae;
         case e_cmova:
             return x86_cmova;