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add in support for decoding smem_offset operand type, which is still …
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…lacking from the ISA spec
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@bbiiggppiigg
bbiiggppiigg committed Nov 30, 2022
1 parent 16bbae6 commit 7f192d2
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Showing 5 changed files with 44 additions and 156 deletions.
16 changes: 16 additions & 0 deletions instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.C
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Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,22 @@ namespace Dyninst {
return {};
}

void InstructionDecoder_amdgpu_gfx908::processOPR_SMEM_OFFSET(layout_ENC_SMEM & layout){
if (layout.IMM ==0 ){
if( layout.SOFFSET_EN ==0 ) {
insn_in_progress-> appendOperand( decodeSGPRorM0(layout.OFFSET), true , false );
}else{
insn_in_progress-> appendOperand( decodeSGPRorM0(layout.SOFFSET), true , false );
}
}else{
if( layout.SOFFSET_EN ==0 ) {
insn_in_progress->appendOperand(Immediate::makeImmediate(Result(s64,layout.OFFSET)),false ,false);
}else{
insn_in_progress->appendOperand(Immediate::makeImmediate(Result(s64,layout.OFFSET)),false,false);
insn_in_progress-> appendOperand( decodeSGPRorM0(layout.SOFFSET),true ,false);
}
}
}

uint32_t InstructionDecoder_amdgpu_gfx908::decodeOPR_LITERAL(){
if (!useImm){
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130 changes: 0 additions & 130 deletions instructionAPI/src/AMDGPU/gfx908/decodeOperands.C
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Original file line number Diff line number Diff line change
Expand Up @@ -576,136 +576,6 @@ case 101 : return makeRegisterExpression(amdgpu_gfx908::s101,0,opr_size);
default: return makeRegisterExpression(amdgpu_gfx908::invalid);
}
}
Expression::Ptr InstructionDecoder_amdgpu_gfx908::decodeOPR_SMEM_OFFSET(uint64_t input, uint32_t opr_size){
switch(input){
case 0 : return makeRegisterExpression(amdgpu_gfx908::s0,0,opr_size);
case 1 : return makeRegisterExpression(amdgpu_gfx908::s1,0,opr_size);
case 2 : return makeRegisterExpression(amdgpu_gfx908::s2,0,opr_size);
case 3 : return makeRegisterExpression(amdgpu_gfx908::s3,0,opr_size);
case 4 : return makeRegisterExpression(amdgpu_gfx908::s4,0,opr_size);
case 5 : return makeRegisterExpression(amdgpu_gfx908::s5,0,opr_size);
case 6 : return makeRegisterExpression(amdgpu_gfx908::s6,0,opr_size);
case 7 : return makeRegisterExpression(amdgpu_gfx908::s7,0,opr_size);
case 8 : return makeRegisterExpression(amdgpu_gfx908::s8,0,opr_size);
case 9 : return makeRegisterExpression(amdgpu_gfx908::s9,0,opr_size);
case 10 : return makeRegisterExpression(amdgpu_gfx908::s10,0,opr_size);
case 11 : return makeRegisterExpression(amdgpu_gfx908::s11,0,opr_size);
case 12 : return makeRegisterExpression(amdgpu_gfx908::s12,0,opr_size);
case 13 : return makeRegisterExpression(amdgpu_gfx908::s13,0,opr_size);
case 14 : return makeRegisterExpression(amdgpu_gfx908::s14,0,opr_size);
case 15 : return makeRegisterExpression(amdgpu_gfx908::s15,0,opr_size);
case 16 : return makeRegisterExpression(amdgpu_gfx908::s16,0,opr_size);
case 17 : return makeRegisterExpression(amdgpu_gfx908::s17,0,opr_size);
case 18 : return makeRegisterExpression(amdgpu_gfx908::s18,0,opr_size);
case 19 : return makeRegisterExpression(amdgpu_gfx908::s19,0,opr_size);
case 20 : return makeRegisterExpression(amdgpu_gfx908::s20,0,opr_size);
case 21 : return makeRegisterExpression(amdgpu_gfx908::s21,0,opr_size);
case 22 : return makeRegisterExpression(amdgpu_gfx908::s22,0,opr_size);
case 23 : return makeRegisterExpression(amdgpu_gfx908::s23,0,opr_size);
case 24 : return makeRegisterExpression(amdgpu_gfx908::s24,0,opr_size);
case 25 : return makeRegisterExpression(amdgpu_gfx908::s25,0,opr_size);
case 26 : return makeRegisterExpression(amdgpu_gfx908::s26,0,opr_size);
case 27 : return makeRegisterExpression(amdgpu_gfx908::s27,0,opr_size);
case 28 : return makeRegisterExpression(amdgpu_gfx908::s28,0,opr_size);
case 29 : return makeRegisterExpression(amdgpu_gfx908::s29,0,opr_size);
case 30 : return makeRegisterExpression(amdgpu_gfx908::s30,0,opr_size);
case 31 : return makeRegisterExpression(amdgpu_gfx908::s31,0,opr_size);
case 32 : return makeRegisterExpression(amdgpu_gfx908::s32,0,opr_size);
case 33 : return makeRegisterExpression(amdgpu_gfx908::s33,0,opr_size);
case 34 : return makeRegisterExpression(amdgpu_gfx908::s34,0,opr_size);
case 35 : return makeRegisterExpression(amdgpu_gfx908::s35,0,opr_size);
case 36 : return makeRegisterExpression(amdgpu_gfx908::s36,0,opr_size);
case 37 : return makeRegisterExpression(amdgpu_gfx908::s37,0,opr_size);
case 38 : return makeRegisterExpression(amdgpu_gfx908::s38,0,opr_size);
case 39 : return makeRegisterExpression(amdgpu_gfx908::s39,0,opr_size);
case 40 : return makeRegisterExpression(amdgpu_gfx908::s40,0,opr_size);
case 41 : return makeRegisterExpression(amdgpu_gfx908::s41,0,opr_size);
case 42 : return makeRegisterExpression(amdgpu_gfx908::s42,0,opr_size);
case 43 : return makeRegisterExpression(amdgpu_gfx908::s43,0,opr_size);
case 44 : return makeRegisterExpression(amdgpu_gfx908::s44,0,opr_size);
case 45 : return makeRegisterExpression(amdgpu_gfx908::s45,0,opr_size);
case 46 : return makeRegisterExpression(amdgpu_gfx908::s46,0,opr_size);
case 47 : return makeRegisterExpression(amdgpu_gfx908::s47,0,opr_size);
case 48 : return makeRegisterExpression(amdgpu_gfx908::s48,0,opr_size);
case 49 : return makeRegisterExpression(amdgpu_gfx908::s49,0,opr_size);
case 50 : return makeRegisterExpression(amdgpu_gfx908::s50,0,opr_size);
case 51 : return makeRegisterExpression(amdgpu_gfx908::s51,0,opr_size);
case 52 : return makeRegisterExpression(amdgpu_gfx908::s52,0,opr_size);
case 53 : return makeRegisterExpression(amdgpu_gfx908::s53,0,opr_size);
case 54 : return makeRegisterExpression(amdgpu_gfx908::s54,0,opr_size);
case 55 : return makeRegisterExpression(amdgpu_gfx908::s55,0,opr_size);
case 56 : return makeRegisterExpression(amdgpu_gfx908::s56,0,opr_size);
case 57 : return makeRegisterExpression(amdgpu_gfx908::s57,0,opr_size);
case 58 : return makeRegisterExpression(amdgpu_gfx908::s58,0,opr_size);
case 59 : return makeRegisterExpression(amdgpu_gfx908::s59,0,opr_size);
case 60 : return makeRegisterExpression(amdgpu_gfx908::s60,0,opr_size);
case 61 : return makeRegisterExpression(amdgpu_gfx908::s61,0,opr_size);
case 62 : return makeRegisterExpression(amdgpu_gfx908::s62,0,opr_size);
case 63 : return makeRegisterExpression(amdgpu_gfx908::s63,0,opr_size);
case 64 : return makeRegisterExpression(amdgpu_gfx908::s64,0,opr_size);
case 65 : return makeRegisterExpression(amdgpu_gfx908::s65,0,opr_size);
case 66 : return makeRegisterExpression(amdgpu_gfx908::s66,0,opr_size);
case 67 : return makeRegisterExpression(amdgpu_gfx908::s67,0,opr_size);
case 68 : return makeRegisterExpression(amdgpu_gfx908::s68,0,opr_size);
case 69 : return makeRegisterExpression(amdgpu_gfx908::s69,0,opr_size);
case 70 : return makeRegisterExpression(amdgpu_gfx908::s70,0,opr_size);
case 71 : return makeRegisterExpression(amdgpu_gfx908::s71,0,opr_size);
case 72 : return makeRegisterExpression(amdgpu_gfx908::s72,0,opr_size);
case 73 : return makeRegisterExpression(amdgpu_gfx908::s73,0,opr_size);
case 74 : return makeRegisterExpression(amdgpu_gfx908::s74,0,opr_size);
case 75 : return makeRegisterExpression(amdgpu_gfx908::s75,0,opr_size);
case 76 : return makeRegisterExpression(amdgpu_gfx908::s76,0,opr_size);
case 77 : return makeRegisterExpression(amdgpu_gfx908::s77,0,opr_size);
case 78 : return makeRegisterExpression(amdgpu_gfx908::s78,0,opr_size);
case 79 : return makeRegisterExpression(amdgpu_gfx908::s79,0,opr_size);
case 80 : return makeRegisterExpression(amdgpu_gfx908::s80,0,opr_size);
case 81 : return makeRegisterExpression(amdgpu_gfx908::s81,0,opr_size);
case 82 : return makeRegisterExpression(amdgpu_gfx908::s82,0,opr_size);
case 83 : return makeRegisterExpression(amdgpu_gfx908::s83,0,opr_size);
case 84 : return makeRegisterExpression(amdgpu_gfx908::s84,0,opr_size);
case 85 : return makeRegisterExpression(amdgpu_gfx908::s85,0,opr_size);
case 86 : return makeRegisterExpression(amdgpu_gfx908::s86,0,opr_size);
case 87 : return makeRegisterExpression(amdgpu_gfx908::s87,0,opr_size);
case 88 : return makeRegisterExpression(amdgpu_gfx908::s88,0,opr_size);
case 89 : return makeRegisterExpression(amdgpu_gfx908::s89,0,opr_size);
case 90 : return makeRegisterExpression(amdgpu_gfx908::s90,0,opr_size);
case 91 : return makeRegisterExpression(amdgpu_gfx908::s91,0,opr_size);
case 92 : return makeRegisterExpression(amdgpu_gfx908::s92,0,opr_size);
case 93 : return makeRegisterExpression(amdgpu_gfx908::s93,0,opr_size);
case 94 : return makeRegisterExpression(amdgpu_gfx908::s94,0,opr_size);
case 95 : return makeRegisterExpression(amdgpu_gfx908::s95,0,opr_size);
case 96 : return makeRegisterExpression(amdgpu_gfx908::s96,0,opr_size);
case 97 : return makeRegisterExpression(amdgpu_gfx908::s97,0,opr_size);
case 98 : return makeRegisterExpression(amdgpu_gfx908::s98,0,opr_size);
case 99 : return makeRegisterExpression(amdgpu_gfx908::s99,0,opr_size);
case 100 : return makeRegisterExpression(amdgpu_gfx908::s100,0,opr_size);
case 101 : return makeRegisterExpression(amdgpu_gfx908::s101,0,opr_size);
case 104 : return makeRegisterExpression(amdgpu_gfx908::xnack_mask_lo,0,opr_size);
case 105 : return makeRegisterExpression(amdgpu_gfx908::xnack_mask_hi,0,opr_size);
case 102 : return makeRegisterExpression(amdgpu_gfx908::flat_scratch_lo,0,opr_size);
case 103 : return makeRegisterExpression(amdgpu_gfx908::flat_scratch_hi,0,opr_size);
case 108 : return makeRegisterExpression(amdgpu_gfx908::ttmp0,0,opr_size);
case 109 : return makeRegisterExpression(amdgpu_gfx908::ttmp1,0,opr_size);
case 110 : return makeRegisterExpression(amdgpu_gfx908::ttmp2,0,opr_size);
case 111 : return makeRegisterExpression(amdgpu_gfx908::ttmp3,0,opr_size);
case 112 : return makeRegisterExpression(amdgpu_gfx908::ttmp4,0,opr_size);
case 113 : return makeRegisterExpression(amdgpu_gfx908::ttmp5,0,opr_size);
case 114 : return makeRegisterExpression(amdgpu_gfx908::ttmp6,0,opr_size);
case 115 : return makeRegisterExpression(amdgpu_gfx908::ttmp7,0,opr_size);
case 116 : return makeRegisterExpression(amdgpu_gfx908::ttmp8,0,opr_size);
case 117 : return makeRegisterExpression(amdgpu_gfx908::ttmp9,0,opr_size);
case 118 : return makeRegisterExpression(amdgpu_gfx908::ttmp10,0,opr_size);
case 119 : return makeRegisterExpression(amdgpu_gfx908::ttmp11,0,opr_size);
case 120 : return makeRegisterExpression(amdgpu_gfx908::ttmp12,0,opr_size);
case 121 : return makeRegisterExpression(amdgpu_gfx908::ttmp13,0,opr_size);
case 122 : return makeRegisterExpression(amdgpu_gfx908::ttmp14,0,opr_size);
case 123 : return makeRegisterExpression(amdgpu_gfx908::ttmp15,0,opr_size);
case 106 : return makeRegisterExpression(amdgpu_gfx908::vcc_lo,0,opr_size);
case 107 : return makeRegisterExpression(amdgpu_gfx908::vcc_hi,0,opr_size);
case 124 : return makeRegisterExpression(amdgpu_gfx908::m0,0,opr_size);
default: return makeRegisterExpression(amdgpu_gfx908::invalid);
}
}
Expression::Ptr InstructionDecoder_amdgpu_gfx908::decodeOPR_SRC(uint64_t input, uint32_t opr_size){
switch(input){
case 0 : return makeRegisterExpression(amdgpu_gfx908::s0,0,opr_size);
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2 changes: 1 addition & 1 deletion instructionAPI/src/AMDGPU/gfx908/decodeOperands.h
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ Expression::Ptr decodeOPR_SDST(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SDST_EXEC(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SDST_M0(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SGPR(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SMEM_OFFSET(uint64_t input, uint32_t opr_size );
void processOPR_SMEM_OFFSET(layout_ENC_SMEM & layout );
Expression::Ptr decodeOPR_SRC(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SRC_ACCVGPR(uint64_t input, uint32_t opr_size );
Expression::Ptr decodeOPR_SRC_ACCVGPR_OR_CONST(uint64_t input, uint32_t opr_size );
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