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Add dyninstAPI/src/inst-power.C
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@hainest
hainest committed Apr 3, 2024
1 parent 71822b1 commit 80a128c
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54 changes: 51 additions & 3 deletions docs/dyninstAPI/developer/inst-power.h.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -12,21 +12,49 @@ to patch up. This must be invalid instructions (any instruction with
its top 10 bits as 0 is invalid (technically UNIMP).

.. cpp:function:: void saveSPR(codeGen &gen, Dyninst::Register scratchReg, int sprnum, int stkOffset)

Generates instructions to save a special purpose register onto the stack.

NOTE: the bit layout of the mfspr instruction is as follows:
``opcode:6 ; RT: 5 ; SPR: 10 ; const 339:10 ; Rc: 1``. However, the two 5-bit halves of the SPR field are
reversed so just using the xfxform will not work.

.. cpp:function:: void restoreSPR(codeGen &gen, Dyninst::Register scratchReg, int sprnum, int stkOffset)

Generates instructions to restore a special purpose register from the stack.

.. cpp:function:: void saveLR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)

Generates instructions to save link register onto stack.

.. cpp:function:: void restoreLR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)

Generates instructions to restore link register from stack.

.. cpp:function:: void setBRL(codeGen &gen, Dyninst::Register scratchReg, long val, unsigned ti)

We're lazy and hand in the next insn
Generates instructions to place a given value into link register. The entire instruction sequence
consists of the generated instructions followed by a given (tail) instruction.

.. cpp:function:: void resetBRL(AddressSpace* p, Address loc, unsigned val)

Writes out instructions in process ``p`` at address ``loc`` to place value ``val`` into the link register.

If ``val == 0``, then the instruction sequence is followed by a ``nop``. If ``val != 0``, then the
instruction sequence is followed by a ``brl``.

.. cpp:function:: void saveCR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)

Generates instructions to save the condition codes register onto stack.

.. cpp:function:: void restoreCR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)
.. cpp:function:: void saveFPSCR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)
.. cpp:function:: void restoreFPSCR(codeGen &gen, Dyninst::Register scratchReg, int stkOffset)
.. cpp:function:: void saveRegister(codeGen &gen, Dyninst::Register reg, int save_off)
.. cpp:function:: void restoreRegister(codeGen &gen, Dyninst::Register source, Dyninst::Register dest, int save_off)

We may want to restore a _logical_ register N (that is, the save slot for N) into a different reg. This avoids using a temporary
We may want to restore a _logical_ register N (that is, the save slot for N) into a different reg. This
avoids using a temporary.

.. cpp:function:: void restoreRegister(codeGen &gen, Dyninst::Register reg, int save_off)

Expand All @@ -35,7 +63,7 @@ its top 10 bits as 0 is invalid (technically UNIMP).
.. cpp:function:: void saveFPRegister(codeGen &gen, Dyninst::Register reg, int save_off)
.. cpp:function:: void restoreFPRegister(codeGen &gen, Dyninst::Register source, Dyninst::Register dest, int save_off)

See above...
See above.

.. cpp:function:: void restoreFPRegister(codeGen &gen, Dyninst::Register reg, int save_off)
.. cpp:function:: void pushStack(codeGen &gen)
Expand Down Expand Up @@ -163,3 +191,23 @@ its top 10 bits as 0 is invalid (technically UNIMP).
#define FUNC_CALL_SAVE_32 (LINKAREA_32 + FUNCARGS_32)
#define FUNC_CALL_SAVE_64 (LINKAREA_64 + FUNCARGS_64)
#define FUNC_CALL_SAVE(x) (((x) == 8) ? FUNC_CALL_SAVE_64 : FUNC_CALL_SAVE_32)
Saving and restoring registers
******************************

We create a new stack frame in the base tramp and save registers above it.
Currently, the plan is:

.. code::
< 220 bytes as per system spec > + 4 for 64-bit alignment
< 14 GPR slots @ 4 bytes each >
< 14 FPR slots @ 8 bytes each >
< 6 SPR slots @ 4 bytes each >
< 1 FP SPR slot @ 8 bytes >
< Space to save live regs at func call >
< Func call overflow area, 32 bytes >
< Linkage area, 24 bytes >
Of course, change all the 4's to 8's for 64-bit mode.
81 changes: 1 addition & 80 deletions dyninstAPI/src/inst-power.C
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@
*/

/*
* inst-power.C - Identify instrumentation points for a RS6000/PowerPCs
* $Id: inst-power.C,v 1.291 2008/06/19 22:13:42 jaw Exp $
*/

Expand Down Expand Up @@ -81,11 +80,6 @@ const char *registerNames[] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
Register floatingLiveRegList[] = {13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 };
unsigned int floatingLiveRegListSize = 14;

// Note that while we have register definitions for r13..r31, we only
// use r0..r12 (well, r3..r12). I believe this is to reduce the number
// of saves that we execute.


void registerSpace::initialize32() {
static bool done = false;
if (done) return;
Expand Down Expand Up @@ -391,36 +385,7 @@ unsigned registerSpace::SPR(Register x) {
break;
}
}


/*
* Saving and restoring registers
* We create a new stack frame in the base tramp and save registers
* above it. Currently, the plan is this:
* < 220 bytes as per system spec > + 4 for 64-bit alignment
* < 14 GPR slots @ 4 bytes each >
* < 14 FPR slots @ 8 bytes each >
* < 6 SPR slots @ 4 bytes each >
* < 1 FP SPR slot @ 8 bytes >
* < Space to save live regs at func call >
* < Func call overflow area, 32 bytes >
* < Linkage area, 24 bytes >
*
* Of course, change all the 4's to 8's for 64-bit mode.
*/

////////////////////////////////////////////////////////////////////
//Generates instructions to save a special purpose register onto
//the stack.
// Returns the number of bytes needed to store the generated
// instructions.
// The instruction storage pointer is advanced the number of
// instructions generated.
//
// NOTE: the bit layout of the mfspr instruction is as follows:
// opcode:6 ; RT: 5 ; SPR: 10 ; const 339:10 ; Rc: 1
// However, the two 5-bit halves of the SPR field are reversed
// so just using the xfxform will not work
void saveSPR(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
int sprnum, //SPR number
Expand All @@ -446,14 +411,6 @@ void saveSPR(codeGen &gen, //Instruction storage pointer
}
}

////////////////////////////////////////////////////////////////////
//Generates instructions to restore a special purpose register from
//the stack.
// Returns the number of bytes needed to store the generated
// instructions.
// The instruction storage pointer is advanced the number of
// instructions generated.
//
void restoreSPR(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
int sprnum, //SPR number
Expand All @@ -479,12 +436,6 @@ void restoreSPR(codeGen &gen, //Instruction storage pointer
insnCodeGen::generate(gen,insn);
}

////////////////////////////////////////////////////////////////////
//Generates instructions to save link register onto stack.
// Returns the number of bytes needed to store the generated
// instructions.
// The instruction storage pointer is advanced the number of
// instructions generated.
void saveLR(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
int stkOffset) //Offset from stack pointer
Expand All @@ -493,29 +444,13 @@ void saveLR(codeGen &gen, //Instruction storage pointer
gen.rs()->markSavedRegister(registerSpace::lr, stkOffset);
}

////////////////////////////////////////////////////////////////////
//Generates instructions to restore link register from stack.
// Returns the number of bytes needed to store the generated
// instructions.
// The instruction storage pointer is advanced the number of
// instructions generated.
//
void restoreLR(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
int stkOffset) //Offset from stack pointer
{
restoreSPR(gen, scratchReg, SPR_LR, stkOffset);
}

////////////////////////////////////////////////////////////////////
//Generates instructions to place a given value into link register.
// The entire instruction sequence consists of the generated
// instructions followed by a given (tail) instruction.
// Returns the number of bytes needed to store the entire
// instruction sequence.
// The instruction storage pointer is advanced the number of
// instructions in the sequence.
//
void setBRL(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
long val, //Value to set link register to
Expand All @@ -537,14 +472,7 @@ void setBRL(codeGen &gen, //Instruction storage pointer
insnCodeGen::generate(gen,insn);
}

//////////////////////////////////////////////////////////////////////////
//Writes out instructions to place a value into the link register.
// If val == 0, then the instruction sequence is followed by a `nop'.
// If val != 0, then the instruction sequence is followed by a `brl'.
//
void resetBRL(AddressSpace *p, //Process to write instructions into
Address loc, //Address in process to write into
unsigned val) //Value to set link register
void resetBRL(AddressSpace* p, Address loc, unsigned val)
{
codeGen gen(10*instruction::size());
Register scratch = 10;
Expand All @@ -557,13 +485,6 @@ void resetBRL(AddressSpace *p, //Process to write instructions into
p->writeTextSpace((void *)loc, gen.used(), gen.start_ptr());
}

/////////////////////////////////////////////////////////////////////////
//Generates instructions to save the condition codes register onto stack.
// Returns the number of bytes needed to store the generated
// instructions.
// The instruction storage pointer is advanced the number of
// instructions generated.
//
void saveCR(codeGen &gen, //Instruction storage pointer
Register scratchReg, //Scratch register
int stkOffset) //Offset from stack pointer
Expand Down

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