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Fix avx-512 opmask size.
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It's 64 bits, not 128.

From Intel(R) 64 and IA-32 Architectures Software Developer’s Manual
June 2021

15.6.1 OPMASK Register to Predicate Vector Data Processing
  The opmask is a set of eight architectural registers of size
  MAX_KL (64-bit).
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hainest committed Nov 21, 2023
1 parent 05c2d65 commit a6c698f
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Showing 2 changed files with 11 additions and 8 deletions.
17 changes: 9 additions & 8 deletions common/h/registers/x86_64_regs.h
Expand Up @@ -61,6 +61,7 @@ namespace Dyninst { namespace x86_64 {
const signed int OCT = 0x00000800; // 128-bit SSE, FC16, XOP, AVX, and FMA3/4
const signed int YMMS = 0x00000900; // 256-bit SSE, AVX2, FMA3/4
const signed int ZMMS = 0x00000A00; // 512-bit AVX-512/AVX10
const signed int KMSKS = 0x00000B00; // 64-bit mask from AVX-512/AVX10

/* Register Categories */
const signed int GPR = 0x00010000; // General-Purpose Registers
Expand Down Expand Up @@ -239,14 +240,14 @@ namespace Dyninst { namespace x86_64 {
DEF_REGISTER( orax, 0x0 | FULL | MISC | Arch_x86_64, "x86_64");
DEF_REGISTER( fsbase, 0x1 | FULL | MISC | Arch_x86_64, "x86_64");
DEF_REGISTER( gsbase, 0x2 | FULL | MISC | Arch_x86_64, "x86_64");
DEF_REGISTER( k0, 0x00 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k1, 0x01 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k2, 0x02 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k3, 0x03 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k4, 0x04 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k5, 0x05 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k6, 0x06 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k7, 0x07 | OCT | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k0, 0x00 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k1, 0x01 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k2, 0x02 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k3, 0x03 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k4, 0x04 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k5, 0x05 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k6, 0x06 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( k7, 0x07 | KMSKS | KMASK | Arch_x86_64, "x86_64");
DEF_REGISTER( xmm0, 0x00 | OCT | XMM | Arch_x86_64, "x86_64");
DEF_REGISTER( xmm1, 0x01 | OCT | XMM | Arch_x86_64, "x86_64");
DEF_REGISTER( xmm2, 0x02 | OCT | XMM | Arch_x86_64, "x86_64");
Expand Down
2 changes: 2 additions & 0 deletions common/src/registers/MachRegister.C
Expand Up @@ -137,6 +137,7 @@ namespace Dyninst {
case x86_64::BIT: return 0;
case x86_64::YMMS: return 32;
case x86_64::ZMMS: return 64;
case x86_64::KMSKS: return 8;
default:
return 0; // Xiaozhu: return 0 as an indication of parsing junk.
}
Expand Down Expand Up @@ -1009,6 +1010,7 @@ namespace Dyninst {
case x86_64::FULL:
case x86_64::OCT:
case x86_64::MMS:
case x86_64::KMSKS:
case x86_64::FPDBL: p = x86_regpos_qword; break;
case x86_64::H_REG: p = x86_regpos_high_byte; break;
case x86_64::L_REG: p = x86_regpos_low_byte; break;
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