Fix the handling of trap instruction on ARM for register liveness ana…

…lysis
dyninst · Oct 6, 2019 · ce93c6e · ce93c6e
1 parent 2955713
commit ce93c6e
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/dataflowAPI/src/liveness.C b/dataflowAPI/src/liveness.C
@@ -567,6 +567,9 @@ ReadWriteInfo LivenessAnalyzer::calcRWSets(Instruction curInsn, Block *blk, Addr
       if (curInsn.getOperation().getID() == power_op_svcs) {
 	isSyscall = true;
       }
+      if (curInsn.getOperation().getID() == aarch64_op_svc) {
+          isSyscall = true;
+      }
       if (isInterrupt || isSyscall) {
 	ret.read |= (abi->getSyscallReadRegisters());
 	ret.written |= (abi->getSyscallWrittenRegisters());