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Handle implict read & written registers
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mxz297 committed Sep 16, 2019
1 parent 2dfdb68 commit e723bed
Showing 1 changed file with 27 additions and 0 deletions.
27 changes: 27 additions & 0 deletions instructionAPI/src/InstructionDecoder-Capstone-x86.C
Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
#include "InstructionDecoder-Capstone.h"

using std::make_pair;

namespace Dyninst {

namespace InstructionAPI {
Expand Down Expand Up @@ -111,6 +113,31 @@ void InstructionDecoder_Capstone::decodeOperands_x86(const Instruction* insn, cs
fprintf(stderr, "Unhandled capstone operand type %d\n", operand->type);
}
}

// The key is a Capstone register enum
// The value is a pair of boolean, where the first represnet whether read or not
// and the second one represents whether written or not
std::map< uint16_t, std::pair<bool, bool> > implicitRegs;
for (int i = 0; i < d->regs_read_count; ++i) {
implicitRegs.insert(make_pair(d->regs_read[i], make_pair(true, false)));
}
for (int i = 0; i < d->regs_write_count; ++i) {
auto it = implicitRegs.find(d->regs_write[i]);
if (it == implicitRegs.end()) {
implicitRegs.insert(make_pair(d->regs_write[i], make_pair(false, true)));
} else {
it->second.second = true;
}
}

for (auto rit = implicitRegs.begin(); rit != implicitRegs.end(); ++rit) {
MachRegister reg = (this->*regTrans)((x86_reg)rit->first);
// Traditionally, instructionAPI only present individual flag fields,
// not the whole flag register
if (reg == x86::flags || reg == x86_64::flags) continue;
Expression::Ptr regAST = makeRegisterExpression(reg);
insn->appendOperand(regAST, rit->second.first, rit->second.second, true);
}
if (err) fprintf(stderr, "\tinstruction %s\n", insn->format().c_str());

}
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