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Added memory barrier before thread scheduling for ARMv8-A ThreadX SMP. (
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#280)
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@TiejunMS
TiejunMS committed Jun 26, 2023
1 parent 08380ca commit 8ff9910
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4 changes: 3 additions & 1 deletion ports_arch/ARMv8-A/threadx_smp/common/src/tx_thread_context_restore.S
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_arch/ARMv8-A/threadx_smp/common/src/tx_thread_system_return.S
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Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a35_smp/ac6/src/tx_thread_context_restore.S
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a35_smp/ac6/src/tx_thread_system_return.S
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Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a35_smp/gnu/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a35_smp/gnu/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a53_smp/ac6/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a53_smp/ac6/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a53_smp/gnu/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a53_smp/gnu/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a55_smp/ac6/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a55_smp/ac6/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a55_smp/gnu/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a57_smp/ac6/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a57_smp/ac6/src/tx_thread_system_return.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:

/* Set ready bit in thread control block. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //
Expand Down
4 changes: 3 additions & 1 deletion ports_smp/cortex_a57_smp/gnu/src/tx_thread_context_restore.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
Expand Down Expand Up @@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:

/* Set bit indicating this thread is ready for execution. */

DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed
Expand Down

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