Use common retn instruction on x86

eclipse · Jun 9, 2021 · 00b4508 · 00b4508
1 parent 9263c24
commit 00b4508
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Showing 6 changed files with 4 additions and 10 deletions.
diff --git a/compiler/x/codegen/OMRCodeGenerator.cpp b/compiler/x/codegen/OMRCodeGenerator.cpp
@@ -1623,7 +1623,7 @@ bool OMR::X86::CodeGenerator::isReturnInstruction(TR::Instruction *instr)
    {
    if (instr->getOpCodeValue() == RET ||
        instr->getOpCodeValue() == RETImm2 ||
-       instr->getOpCodeValue() == ReturnMarker
+       instr->getOpCodeValue() == TR::InstOpCode::retn
       )
       return true;
    else

diff --git a/compiler/x/codegen/OMRInstOpCode.enum b/compiler/x/codegen/OMRInstOpCode.enum
@@ -1050,4 +1050,3 @@
    PPS_OPCount,
    PPS_OPField,
    AdjustFramePtr,
-   ReturnMarker,
diff --git a/compiler/x/codegen/OMRInstOpCode.enum.temp.defines b/compiler/x/codegen/OMRInstOpCode.enum.temp.defines
@@ -1038,4 +1038,3 @@
 #define   PPS_OPCount OMR::InstOpCode::PPS_OPCount
 #define   PPS_OPField OMR::InstOpCode::PPS_OPField
 #define   AdjustFramePtr OMR::InstOpCode::AdjustFramePtr
-#define   ReturnMarker OMR::InstOpCode::ReturnMarker
diff --git a/compiler/x/codegen/OMRInstruction.cpp b/compiler/x/codegen/OMRInstruction.cpp
@@ -231,7 +231,7 @@ void OMR::X86::Instruction::adjustVFPState(TR_VFPState *state, TR::CodeGenerator
          state->_displacement += static_cast<int32_t>(TR::Compiler->om.sizeofReferenceAddress());
       else if (self()->getOpCode().isPopOp())
          state->_displacement -= static_cast<int32_t>(TR::Compiler->om.sizeofReferenceAddress());
-      else if (self()->getOpCodeValue() == RET || self()->getOpCodeValue() == RETImm2 || self()->getOpCodeValue() == ReturnMarker)
+      else if (self()->getOpCodeValue() == RET || self()->getOpCodeValue() == RETImm2 || self()->getOpCodeValue() == TR::InstOpCode::retn)
          *state = cg->vfpResetInstruction()->getSavedState();
       }
    }

diff --git a/compiler/x/codegen/OMRMachine.cpp b/compiler/x/codegen/OMRMachine.cpp
@@ -152,7 +152,7 @@ bool existsNextInstructionToTestFlags(TR::Instruction *startInstr,
           cursor->getOpCodeValue() != TR::InstOpCode::label   &&
           cursor->getOpCodeValue() != RET     &&
           cursor->getOpCodeValue() != RETImm2 &&
-          cursor->getOpCodeValue() != ReturnMarker &&
+          cursor->getOpCodeValue() != TR::InstOpCode::retn &&
           !cursor->getOpCode().isBranchOp());
 
    return false;
@@ -2732,7 +2732,7 @@ TR::Instruction *OMR::X86::Machine::freeBestFPRegister(TR::Instruction *prevInst
           cursor->getOpCodeValue() != TR::InstOpCode::label   &&
           cursor->getOpCodeValue() != RET     &&
           cursor->getOpCodeValue() != RETImm2 &&
-          cursor->getOpCodeValue() != ReturnMarker &&
+          cursor->getOpCodeValue() != TR::InstOpCode::retn &&
           !cursor->getOpCode().isBranchOp())
       {
       for (int i = 0; i < numCandidates; i++)

diff --git a/compiler/x/codegen/X86Ops.ins b/compiler/x/codegen/X86Ops.ins
@@ -4136,7 +4136,3 @@ INSTRUCTION(AdjustFramePtr, AdjustFramePtr, // Adjust frame pointer
             BINARY(VEX_L___, VEX_vNONE, PREFIX___, REX__, ESCAPE_____, 0x00, 0, ModRM_NONE, Immediate_0),
             PROPERTY0(0),
             PROPERTY1(IA32OpProp1_PseudoOp)),
-INSTRUCTION(ReturnMarker, ReturnMarker, // Return Marker for linkages that do not end with a RET instruction
-            BINARY(VEX_L___, VEX_vNONE, PREFIX___, REX__, ESCAPE_____, 0x00, 0, ModRM_NONE, Immediate_0),
-            PROPERTY0(0),
-            PROPERTY1(IA32OpProp1_PseudoOp)),