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Add template for function generateS390CompareAndBranchInstruction a…
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…nd cast the relevant use cases

Adding template for function `generateS390CompareAndBranchInstruction` and initialize it to pass in int32_t or int64_t type only for the parameter `second`.Also, cast the type of the parameter to either int32_t or int64_t in the use cases if needed.

Adding a new signiture to have it pass in `TR::RealRegister *` type for parameter `second`, and casting it to `TR::Register *` type to use the relevant function.

Signed-off-by: simonameng <simonameng97@gmail.com>
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simonameng committed Aug 13, 2019
1 parent 6e99760 commit 0e46aba
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Showing 5 changed files with 67 additions and 14 deletions.
10 changes: 5 additions & 5 deletions compiler/z/codegen/BinaryEvaluator.cpp
View file
Expand Up @@ -296,12 +296,12 @@ genNullTestForCompressedPointers(TR::Node *node, TR::CodeGenerator *cg, TR::Regi
{
TR::Register* r = addOrSubNode->getFirstChild()->getRegister();
generateS390LabelInstruction(cg, TR::InstOpCode::LABEL, node, cFlowRegionStart);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpOpCode(), node, r, (signed char)0, TR::InstOpCode::COND_BE, skipAdd);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpOpCode(), node, r, 0, TR::InstOpCode::COND_BE, skipAdd);
}
else
{
generateS390LabelInstruction(cg, TR::InstOpCode::LABEL, node, cFlowRegionStart);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpOpCode(), node, targetRegister, (signed char)0, TR::InstOpCode::COND_BE, skipAdd);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpOpCode(), node, targetRegister, 0, TR::InstOpCode::COND_BE, skipAdd);
}

cFlowRegionStart->setStartInternalControlFlow();
Expand Down Expand Up @@ -809,7 +809,7 @@ lDivRemGenericEvaluator64(TR::Node * node, TR::CodeGenerator * cg, bool isDivisi

generateS390LabelInstruction(cg, TR::InstOpCode::LABEL, node, cFlowRegionStart);
cFlowRegionStart->setStartInternalControlFlow();
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CG, node, firstRegister, (signed char)0,TR::InstOpCode::COND_BNL, skipSet);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CG, node, firstRegister, 0,TR::InstOpCode::COND_BNL, skipSet);

//adjustment to dividend if dividend is negative
TR::RegisterDependencyConditions *deps = new (cg->trHeapMemory()) TR::RegisterDependencyConditions(0, 2, cg);
Expand Down Expand Up @@ -1126,7 +1126,7 @@ iDivRemGenericEvaluator(TR::Node * node, TR::CodeGenerator * cg, bool isDivision

generateS390BranchInstruction(cg, TR::InstOpCode::BRC, TR::InstOpCode::COND_BNE, node, doDiv);

generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::C, node, sourceRegister, (signed char)-1, TR::InstOpCode::COND_BNE, doDiv);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::C, node, sourceRegister, -1, TR::InstOpCode::COND_BNE, doDiv);
cursor =
generateRRInstruction(cg, TR::InstOpCode::LR, node, quoRegister, remRegister);

Expand Down Expand Up @@ -2373,7 +2373,7 @@ OMR::Z::TreeEvaluator::lmulhEvaluator(TR::Node * node, TR::CodeGenerator * cg)
// positive first child, branch to posMulh label
generateS390LabelInstruction(cg, TR::InstOpCode::LABEL, node, cFlowRegionStart);
cFlowRegionStart->setStartInternalControlFlow();
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CG, node, sourceRegister, (signed char)0, TR::InstOpCode::COND_BNL, posMulh);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CG, node, sourceRegister, 0, TR::InstOpCode::COND_BNL, posMulh);

// Negative first child, do complements on register
generateRRInstruction(cg, TR::InstOpCode::LCGR, node, sourceRegister, sourceRegister);
Expand Down
12 changes: 6 additions & 6 deletions compiler/z/codegen/ControlFlowEvaluator.cpp
View file
Expand Up @@ -1774,14 +1774,14 @@ OMR::Z::TreeEvaluator::tableEvaluator(TR::Node * node, TR::CodeGenerator * cg)
case AddressTable32bit:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateRSInstruction(cg, TR::InstOpCode::SLL, node, selectorReg, 2);
}
break;
case AddressTable64bitIntLookup:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);

generateRSInstruction(cg, TR::InstOpCode::SLLG, node, selectorReg, selectorReg, 3);
}
Expand All @@ -1790,29 +1790,29 @@ OMR::Z::TreeEvaluator::tableEvaluator(TR::Node * node, TR::CodeGenerator * cg)
case AddressTable64bitLongLookup:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CLG, node, selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CLG, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);
generateRSInstruction(cg, TR::InstOpCode::SLLG, node, selectorReg, selectorReg, 3);
generateRRInstruction(cg, TR::InstOpCode::LGFR, node, selectorReg, selectorReg);
}
break;
case RelativeTable32bit:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateRSInstruction(cg, TR::InstOpCode::SLL, node, selectorReg, 2);
}
break;
case RelativeTable64bitIntLookup:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node,selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CL, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false); //make sure the case selector is within range of our case constants
generateRSInstruction(cg, TR::InstOpCode::SLL, node, selectorReg, 2);
}
break;
case RelativeTable64bitLongLookup:
{
if(!node->chkCannotOverflow())
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CLG, node, selectorReg, numBranchTableEntries, TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::CLG, node, selectorReg, static_cast<int64_t>(numBranchTableEntries), TR::InstOpCode::COND_BNL, node->getSecondChild()->getBranchDestination()->getNode()->getLabel(), false, false);
generateRSInstruction(cg, TR::InstOpCode::SLLG, node, selectorReg, selectorReg, 2);
}
break;
Expand Down
2 changes: 1 addition & 1 deletion compiler/z/codegen/OMRTreeEvaluator.cpp
View file
Expand Up @@ -15359,7 +15359,7 @@ inlineStringHashCode(TR::Node* node, TR::CodeGenerator* cg, bool isCompressed)
generateRREInstruction(cg, TR::InstOpCode::getXORRegOpCode(), node, registerHash, registerHash);

// Branch to labelSerial if registerCount < stringSize
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpLogicalOpCode(), node, registerCount, stringSize, TR::InstOpCode::COND_MASK4, labelSerial, false, false);
generateS390CompareAndBranchInstruction(cg, TR::InstOpCode::getCmpLogicalOpCode(), node, registerCount, static_cast<int32_t>(stringSize), TR::InstOpCode::COND_MASK4, labelSerial, false, false);

generateS390LabelInstruction(cg, TR::InstOpCode::LABEL, node, labelVector);

Expand Down
43 changes: 42 additions & 1 deletion compiler/z/codegen/S390GenerateInstructions.cpp
View file
Expand Up @@ -361,6 +361,20 @@ generateS390CompareAndBranchInstruction(TR::CodeGenerator * cg,
return returnInstruction;
}

TR::Instruction *
generateS390CompareAndBranchInstruction(TR::CodeGenerator * cg,
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first ,
TR::RealRegister * second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC,
bool targetIsFarAndCold)
{
return generateS390CompareAndBranchInstruction(cg, compareOpCode, node, first, static_cast<TR::Register *>(second), bc, branchDestination, needsCC, targetIsFarAndCold);
}

/**
* Generate a compare and a branch instruction. if z10 is available, this will
* attempt to generate a COMPARE AND BRANCH instruction, otherwise the a
Expand All @@ -376,12 +390,13 @@ generateS390CompareAndBranchInstruction(TR::CodeGenerator * cg,
* You can force the TR::InstOpCode::C* + TR::InstOpCode::BRC to be generated by setting the needsCC
* parameter to true (the default).
*/
template <typename imm32Or64Bit>
TR::Instruction *
generateS390CompareAndBranchInstruction(TR::CodeGenerator * cg,
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first ,
int32_t second,
imm32Or64Bit second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC,
Expand Down Expand Up @@ -3184,3 +3199,29 @@ generateS390DAAExceptionRestoreSnippet(TR::CodeGenerator* cg,
}
}
#endif

template TR::Instruction * generateS390CompareAndBranchInstruction<int32_t>(
TR::CodeGenerator * cg,
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first,
int32_t second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC = true,
bool targetIsFarAndCold = false,
TR::Instruction *preced = 0,
TR::RegisterDependencyConditions *cond = 0);

template TR::Instruction * generateS390CompareAndBranchInstruction<int64_t>(
TR::CodeGenerator * cg,
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first,
int64_t second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC = true,
bool targetIsFarAndCold = false,
TR::Instruction *preced = 0,
TR::RegisterDependencyConditions *cond = 0);
14 changes: 13 additions & 1 deletion compiler/z/codegen/S390GenerateInstructions.hpp
View file
Expand Up @@ -194,7 +194,19 @@ TR::Instruction * generateS390CompareAndBranchInstruction(
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first,
int32_t second,
TR::RealRegister * second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC = true,
bool targetIsFarAndCold = false);

template <typename imm32Or64Bit>
TR::Instruction * generateS390CompareAndBranchInstruction(
TR::CodeGenerator * cg,
TR::InstOpCode::Mnemonic compareOpCode,
TR::Node * node,
TR::Register * first,
imm32Or64Bit second,
TR::InstOpCode::S390BranchCondition bc,
TR::LabelSymbol * branchDestination,
bool needsCC = true,
Expand Down

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