Use common fence instruction on x86

eclipse · Jun 9, 2021 · 116b1ce · 116b1ce
1 parent ef995bc
commit 116b1ce
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Showing 6 changed files with 5 additions and 11 deletions.
diff --git a/compiler/x/codegen/OMRCodeGenerator.cpp b/compiler/x/codegen/OMRCodeGenerator.cpp
@@ -2372,7 +2372,7 @@ TR::RealRegister::RegNum OMR::X86::CodeGenerator::pickNOPRegister(TR::Instructio
       static const int32_t WINDOW_SIZE = 5;
       while (j <= WINDOW_SIZE && cursor)
          {
-         if (cursor->getOpCodeValue() != FENCE &&
+         if (cursor->getOpCodeValue() != TR::InstOpCode::fence &&
              cursor->getOpCodeValue() != LABEL)
             {
             ++j;

diff --git a/compiler/x/codegen/OMRInstOpCode.enum b/compiler/x/codegen/OMRInstOpCode.enum
@@ -1037,7 +1037,6 @@
    VFNMSUB213SDRegRegMem,
    VFNMSUB231SDRegRegReg,
    VFNMSUB231SDRegRegMem,
-   FENCE,
    VGFENCE,
    PROCENTRY,
    DQImm64,

diff --git a/compiler/x/codegen/OMRInstOpCode.enum.temp.defines b/compiler/x/codegen/OMRInstOpCode.enum.temp.defines
@@ -1025,7 +1025,6 @@
 #define   VFNMSUB213SDRegRegMem OMR::InstOpCode::VFNMSUB213SDRegRegMem
 #define   VFNMSUB231SDRegRegReg OMR::InstOpCode::VFNMSUB231SDRegRegReg
 #define   VFNMSUB231SDRegRegMem OMR::InstOpCode::VFNMSUB231SDRegRegMem
-#define   FENCE OMR::InstOpCode::FENCE
 #define   VGFENCE OMR::InstOpCode::VGFENCE
 #define   PROCENTRY OMR::InstOpCode::PROCENTRY
 #define   DQImm64 OMR::InstOpCode::DQImm64

diff --git a/compiler/x/codegen/OMRMachine.cpp b/compiler/x/codegen/OMRMachine.cpp
@@ -552,7 +552,7 @@ TR::RealRegister *OMR::X86::Machine::freeBestGPRegister(TR::Instruction
       if (distance > FREE_BEST_REGISTER_SEARCH_DISTANCE)
          break;
 
-      if (cursor->getOpCodeValue() == FENCE)
+      if (cursor->getOpCodeValue() == TR::InstOpCode::fence)
          {
          // Don't walk past the start of the super (extended) block.
          // This is primarily for the non-linear register assigner because
@@ -564,7 +564,7 @@ TR::RealRegister *OMR::X86::Machine::freeBestGPRegister(TR::Instruction
             break;
          }
 
-      if (cursor->getOpCodeValue() == FENCE ||
+      if (cursor->getOpCodeValue() == TR::InstOpCode::fence ||
           cursor->getOpCodeValue() == FPREGSPILL)
          continue;
 

diff --git a/compiler/x/codegen/OMRTreeEvaluator.cpp b/compiler/x/codegen/OMRTreeEvaluator.cpp
@@ -3445,7 +3445,7 @@ TR::Register *OMR::X86::TreeEvaluator::BBStartEvaluator(TR::Node *node, TR::Code
       }
 
    TR::Instruction *fence =
-      generateFenceInstruction(FENCE,
+      generateFenceInstruction(TR::InstOpCode::fence,
                                node,
                                TR::Node::createRelative32BitFenceNode(node, &block->getInstructionBoundaries()._startPC),
                                cg);
@@ -3490,7 +3490,7 @@ TR::Register *OMR::X86::TreeEvaluator::BBEndEvaluator(TR::Node *node, TR::CodeGe
    TR::Compilation *comp = cg->comp();
    TR::TreeTop *nextTT = cg->getCurrentEvaluationTreeTop()->getNextTreeTop();
 
-   TR::X86FenceInstruction  *instr = generateFenceInstruction(FENCE, node, TR::Node::createRelative32BitFenceNode(node, &node->getBlock()->getInstructionBoundaries()._endPC), cg);
+   TR::X86FenceInstruction  *instr = generateFenceInstruction(TR::InstOpCode::fence, node, TR::Node::createRelative32BitFenceNode(node, &node->getBlock()->getInstructionBoundaries()._endPC), cg);
 
    node->getBlock()->setLastInstruction(instr);
 

diff --git a/compiler/x/codegen/X86Ops.ins b/compiler/x/codegen/X86Ops.ins
@@ -4084,10 +4084,6 @@ INSTRUCTION(VFNMSUB231SDRegRegMem, vfnmsub231sd,
             PROPERTY1(IA32OpProp1_XMMSource | IA32OpProp1_SourceIsMemRef | IA32OpProp1_XMMTarget)),
 
 // OpCodes beyond this point are pseudo instructions; they are for OMR internal usage only.
-INSTRUCTION(FENCE, Fence, // Address of binary is to be written to specified data address, SymbolReference controls code motion across fence
-            BINARY(VEX_L___, VEX_vNONE, PREFIX___, REX__, ESCAPE_____, 0x00, 0, ModRM_NONE, Immediate_0),
-            PROPERTY0(0),
-            PROPERTY1(IA32OpProp1_PseudoOp)),
 INSTRUCTION(VGFENCE, VGFence, // Special Fence used for patching virtual guards
             BINARY(VEX_L___, VEX_vNONE, PREFIX___, REX__, ESCAPE_____, 0x00, 0, ModRM_NONE, Immediate_0),
             PROPERTY0(0),