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Merge pull request #5737 from Akira1Saitoh/aarch64CBZGlRegDeps
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AArch64: Use b.cond instead of cbz/cbnz when all register are used up
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knn-k committed Jan 6, 2021
2 parents 99816ca + 833b00a commit 13926a7
Showing 1 changed file with 9 additions and 2 deletions.
11 changes: 9 additions & 2 deletions compiler/aarch64/codegen/ControlFlowEvaluator.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright (c) 2018, 2020 IBM Corp. and others
* Copyright (c) 2018, 2021 IBM Corp. and others
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
Expand Down Expand Up @@ -135,7 +135,14 @@ if (cg->profiledPointersRequireRelocation() && secondChild->getOpCodeValue() ==
{
int64_t secondChildValue = is64bit ? secondChild->getLongInt() : secondChild->getInt();
if ((cc == TR::CC_EQ || cc == TR::CC_NE)
&& secondChildValue == 0)
&& (secondChildValue == 0)
/* If the node has the third child (TR::GlRegDeps)
* and if the number of children of it equals to the number of allocatable integer registers,
* we cannot assign a register for a cbz/cbnz instruction because all registers are used up.
* We need to use a b.cond instruction instead for that case.
*/
&& ((node->getNumChildren() != 3) ||
(node->getChild(2)->getNumChildren() != cg->getLinkage()->getProperties().getNumAllocatableIntegerRegisters())))
{
TR::InstOpCode::Mnemonic op;
if (cc == TR::CC_EQ )
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