Fix spelling mistakes in OMRProcessorArchitecture enum

For RISCV32 and RISCV64 enum variants in OMRProcessorArchitecture, 'processor' was spelt 'procesor'. This patch fixes the spelling. Signed-off-by: Nathan Henderson <nathan.henderson@ibm.com>
eclipse · Feb 7, 2024 · 174c167 · 174c167
1 parent f010ed6
commit 174c167
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Showing 4 changed files with 7 additions and 7 deletions.
diff --git a/compiler/riscv/env/OMRCPU.cpp b/compiler/riscv/env/OMRCPU.cpp
@@ -50,7 +50,7 @@ OMR::RV::CPU::getProcessorName()
    const char* returnString = "";
    switch(_processorDescription.processor)
       {
-      case OMR_PROCESOR_RISCV64_UNKNOWN:
+      case OMR_PROCESSOR_RISCV64_UNKNOWN:
          returnString = "Unknown RV64G processor";
          break;
       default:

diff --git a/compiler/riscv/env/OMRCPU.hpp b/compiler/riscv/env/OMRCPU.hpp
@@ -50,8 +50,8 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU
 
    CPU() : OMR::CPU()
       {
-      _processorDescription.processor = OMR_PROCESOR_RISCV64_UNKNOWN;
-      _processorDescription.physicalProcessor = OMR_PROCESOR_RISCV64_UNKNOWN;
+      _processorDescription.processor = OMR_PROCESSOR_RISCV64_UNKNOWN;
+      _processorDescription.physicalProcessor = OMR_PROCESSOR_RISCV64_UNKNOWN;
       memset(_processorDescription.features, 0, OMRPORT_SYSINFO_FEATURES_SIZE*sizeof(uint32_t));
       }
    CPU(const OMRProcessorDesc& processorDescription) : OMR::CPU(processorDescription) {}

diff --git a/include_core/omrport.h b/include_core/omrport.h
@@ -1465,8 +1465,8 @@ typedef enum OMRProcessorArchitecture {
 	OMR_PROCESSOR_X86_AMD_LAST = OMR_PROCESSOR_X86_AMDFAMILY15H,
 	OMR_PROCESSOR_X86_LAST = OMR_PROCESSOR_X86_AMDFAMILY15H,
 
-	OMR_PROCESOR_RISCV32_UNKNOWN,
-	OMR_PROCESOR_RISCV64_UNKNOWN,
+	OMR_PROCESSOR_RISCV32_UNKNOWN,
+	OMR_PROCESSOR_RISCV64_UNKNOWN,
 
 	OMR_PROCESSOR_DUMMY = 0x40000000 /* force wide enums */
 

diff --git a/port/unix/omrsysinfo.c b/port/unix/omrsysinfo.c
@@ -1885,9 +1885,9 @@ static intptr_t
 omrsysinfo_get_riscv_description(struct OMRPortLibrary *portLibrary, OMRProcessorDesc *desc)
 {
 #if defined(RISCV32)
-	desc->processor = OMR_PROCESOR_RISCV32_UNKNOWN;
+	desc->processor = OMR_PROCESSOR_RISCV32_UNKNOWN;
 #elif defined(RISCV64)
-	desc->processor = OMR_PROCESOR_RISCV64_UNKNOWN;
+	desc->processor = OMR_PROCESSOR_RISCV64_UNKNOWN;
 #elif
 	desc->processor = OMR_PROCESSOR_UNDEFINED;
 #endif