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Eliminate targetSupportsSoftwarePrefetches flag
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This flag was always set to true and all supported target x86 processors support
prefetch instructions. This flag is unnecessary.

Signed-off-by: Daryl Maier <maier@ca.ibm.com>
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0xdaryl committed Jun 4, 2024
1 parent f4ed921 commit 694185f
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Showing 2 changed files with 2 additions and 10 deletions.
4 changes: 1 addition & 3 deletions compiler/x/codegen/OMRCodeGenerator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -323,15 +323,13 @@ OMR::X86::CodeGenerator::initializeX86(TR::Compilation *comp)
self()->setXMMDoubleLoadOpCode(TR::InstOpCode::MOVSDRegMem);
}

self()->setTargetSupportsSoftwarePrefetches();

// Enable software prefetch of the TLH and configure the TLH prefetching
// geometry.
//
TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_CORE2) == comp->cg()->getX86ProcessorInfo().isIntelCore2(), "isIntelCore2() failed\n");
TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_NEHALEM) == comp->cg()->getX86ProcessorInfo().isIntelNehalem(), "isIntelNehalem() failed\n");
if (((!comp->getOption(TR_DisableTLHPrefetch) && (comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_CORE2) || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_NEHALEM))) ||
(comp->getOption(TR_TLHPrefetch) && self()->targetSupportsSoftwarePrefetches())))
(comp->getOption(TR_TLHPrefetch))))
{
self()->setEnableTLHPrefetching();
}
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8 changes: 1 addition & 7 deletions compiler/x/codegen/OMRCodeGenerator.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -800,7 +800,7 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
EnableTLHPrefetching = 0x00000800, ///< enable software prefetches on TLH allocates
// Available = 0x00001000,
// Available = 0x00002000,
TargetSupportsSoftwarePrefetches = 0x00004000, ///< target processor and OS both support software prefetch instructions
// Available = 0x00004000,
MethodEnterExitTracingEnabled = 0x00008000, ///< trace method enter/exits
// Available = 0x00010000,
PushPreservedRegisters = 0x00020000 ///< we've chosen to save/restore preserved regs using push/pop instructions instead of movs
Expand Down Expand Up @@ -848,12 +848,6 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
}
void setEnableRegisterAssociations() {_flags.set(EnableRegisterAssociations);}

bool targetSupportsSoftwarePrefetches()
{
return _flags.testAny(TargetSupportsSoftwarePrefetches);
}
void setTargetSupportsSoftwarePrefetches() {_flags.set(TargetSupportsSoftwarePrefetches);}

bool enableTLHPrefetching()
{
return _flags.testAny(EnableTLHPrefetching);
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