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Migrate fence to the common codegen
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@fjeremic
fjeremic committed May 12, 2021
1 parent c922bd4 commit 8d698eb
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Showing 16 changed files with 38 additions and 41 deletions.
2 changes: 1 addition & 1 deletion compiler/aarch64/codegen/ARM64BinaryEncoding.cpp
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Expand Up @@ -357,7 +357,7 @@ uint8_t *TR::ARM64AdminInstruction::generateBinaryEncoding()
TR::InstOpCode::Mnemonic op = getOpCodeValue();
int32_t i;

if (op == OMR::InstOpCode::fence)
if (op == TR::InstOpCode::fence)
{
TR::Node *fenceNode = getFenceNode();
uint32_t rtype = fenceNode->getRelocationType();
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2 changes: 1 addition & 1 deletion compiler/aarch64/codegen/ARM64Debug.cpp
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Expand Up @@ -96,6 +96,7 @@ static const char *opCodeToNameMap[] =
"assocreg",
"bad",
"dd",
"fence",
"cbzw",
"cbnzw",
"cbzx",
Expand Down Expand Up @@ -748,7 +749,6 @@ static const char *opCodeToNameMap[] =
"vnot16b",
"nop",
"proc",
"fence",
"return",
"label",
"vgdnop",
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1 change: 0 additions & 1 deletion compiler/aarch64/codegen/OMRInstOpCode.enum
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Expand Up @@ -734,7 +734,6 @@
nop, /* 0xD503201F NOP */
/* Internal OpCodes */
proc, // Entry to the method
fence, // Fence
retn, // Return
label, // Destination of a jump
vgdnop, // Virtual Guard NOP instruction
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3 changes: 2 additions & 1 deletion compiler/codegen/OMRInstOpCode.enum
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Expand Up @@ -26,4 +26,5 @@

assocreg, // Register Association
bad, // Bad Opcode
dd, // Define Doubleword
dd, // Define Doubleword
fence, // Fence
1 change: 0 additions & 1 deletion compiler/p/codegen/OMRInstOpCode.enum
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Expand Up @@ -538,7 +538,6 @@
xoris, // XOR immediate shifted
nop, // NoOp (ori)
genop, // Group Ending NoOp (ori)
fence, // Fence
shdfence, // Scheduling Fence
ret, // Return
// rxor, // Rotate & XOR
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22 changes: 11 additions & 11 deletions compiler/p/codegen/OMRInstOpCodeProperties.hpp
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Expand Up @@ -58,6 +58,17 @@
/* .properties = */ PPCOpProp_None,
},

{
/* .mnemonic = */ OMR::InstOpCode::fence,
/* .name = */ "fence",
/* .description = "Fence", */
/* .prefix = */ 0x00000000,
/* .opcode = */ 0x00000000,
/* .format = */ FORMAT_NONE,
/* .minimumALS = */ OMR_PROCESSOR_PPC_UNKNOWN,
/* .properties = */ PPCOpProp_SyncSideEffectFree,
},

{
/* .mnemonic = */ OMR::InstOpCode::add,
/* .name = */ "add",
Expand Down Expand Up @@ -6202,17 +6213,6 @@
/* .properties = */ PPCOpProp_SyncSideEffectFree,
},

{
/* .mnemonic = */ OMR::InstOpCode::fence,
/* .name = */ "fence",
/* .description = "Fence", */
/* .prefix = */ 0x00000000,
/* .opcode = */ 0x00000000,
/* .format = */ FORMAT_NONE,
/* .minimumALS = */ OMR_PROCESSOR_PPC_UNKNOWN,
/* .properties = */ PPCOpProp_SyncSideEffectFree,
},

{
/* .mnemonic = */ OMR::InstOpCode::shdfence,
/* .name = */ "shdfence",
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1 change: 0 additions & 1 deletion compiler/riscv/codegen/OMRInstOpCode.enum
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Expand Up @@ -34,7 +34,6 @@
#undef DECLARE_INSN
/* Internal OpCodes */
proc, // Entry to the method
fence, // Fence
retn, // Return
label, // Destination of a jump
RVLastOp = label,
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2 changes: 1 addition & 1 deletion compiler/riscv/codegen/RVDebug.cpp
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Expand Up @@ -42,14 +42,14 @@ static const char *opCodeToNameMap[] =
"assocreg",
"bad",
"dd",
"fence",
/*
* RISC-V instructions
*/
#define DECLARE_INSN(mnemonic, match, mask) #mnemonic,
#include <riscv-opc.h>
#undef DECLARE_INSN
"proc",
"fence",
"return",
"label"
};
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2 changes: 1 addition & 1 deletion compiler/z/codegen/InstOpCode.cpp
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Expand Up @@ -62,7 +62,7 @@ OMR::Z::InstOpCode::isAdmin()
return (_mnemonic == RET ||
_mnemonic == assocreg ||
_mnemonic == DEPEND ||
_mnemonic == FENCE ||
_mnemonic == fence ||
_mnemonic == PROC ||
_mnemonic == dd ||
_mnemonic == DC2 ||
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1 change: 0 additions & 1 deletion compiler/z/codegen/OMRInstOpCode.enum
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Expand Up @@ -32,7 +32,6 @@
DC2, // DC2
DCB, // Debug Counter Bump
DEPEND, // Someplace to hang dependencies
FENCE, // Fence
LABEL, // Destination of a jump
PROC, // Entry to the method
RET, // Return
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22 changes: 11 additions & 11 deletions compiler/z/codegen/OMRInstOpCodeProperties.hpp
View file
Expand Up @@ -58,6 +58,17 @@
/* .properties = */ S390OpProp_None
},

{
/* .mnemonic = */ OMR::InstOpCode::fence,
/* .name = */ "fence",
/* .description = */ "Fence",
/* .opcode[0] = */ 0x00,
/* .opcode[1] = */ 0x00,
/* .format = */ PSEUDO,
/* .minimumALS = */ OMR_PROCESSOR_S390_UNKNOWN,
/* .properties = */ S390OpProp_None
},

{
/* .mnemonic = */ OMR::InstOpCode::BREAK,
/* .name = */ "BREAK",
Expand Down Expand Up @@ -106,17 +117,6 @@
/* .properties = */ S390OpProp_None
},

{
/* .mnemonic = */ OMR::InstOpCode::FENCE,
/* .name = */ "FENCE",
/* .description = */ "Fence",
/* .opcode[0] = */ 0x00,
/* .opcode[1] = */ 0x00,
/* .format = */ PSEUDO,
/* .minimumALS = */ OMR_PROCESSOR_S390_UNKNOWN,
/* .properties = */ S390OpProp_None
},

{
/* .mnemonic = */ OMR::InstOpCode::LABEL,
/* .name = */ "LABEL",
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2 changes: 1 addition & 1 deletion compiler/z/codegen/OMRInstruction.cpp
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Expand Up @@ -725,7 +725,7 @@ static void handleLoadWithRegRanges(TR::Instruction *inst, TR::CodeGenerator *cg
bool found = false;
while (cursor)
{
if (cursor->getOpCodeValue() == TR::InstOpCode::FENCE && cursor->getNode()->getOpCodeValue() == TR::BBStart)
if (cursor->getOpCodeValue() == TR::InstOpCode::fence && cursor->getNode()->getOpCodeValue() == TR::BBStart)
{
TR::Block *block = cursor->getNode()->getBlock();
if (!block->isExtensionOfPreviousBlock())
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2 changes: 1 addition & 1 deletion compiler/z/codegen/OMRPeephole.cpp
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Expand Up @@ -697,7 +697,7 @@ OMR::Z::Peephole::tryToForwardBranchTarget()
if (targetInst == NULL)
return false;

while (targetInst->isLabel() || targetInst->getOpCodeValue() == TR::InstOpCode::FENCE)
while (targetInst->isLabel() || targetInst->getOpCodeValue() == TR::InstOpCode::fence)
targetInst = targetInst->getNext();

if (targetInst->getOpCodeValue() == TR::InstOpCode::BRC)
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12 changes: 6 additions & 6 deletions compiler/z/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -9481,11 +9481,11 @@ OMR::Z::TreeEvaluator::BBStartEvaluator(TR::Node * node, TR::CodeGenerator * cg)
if (!generateFence)
{
// Even though we dont generate fences for every BB, catch blocks require it.
if (block->isCatchBlock()) fence = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node, (TR::Node *) NULL);
if (block->isCatchBlock()) fence = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node, (TR::Node *) NULL);
}
else
{
fence = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node,
fence = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node,
TR::Node::createRelative32BitFenceNode(node, &block->getInstructionBoundaries()._startPC));

// Save the first instruction of the block.
Expand Down Expand Up @@ -9517,7 +9517,7 @@ OMR::Z::TreeEvaluator::BBEndEvaluator(TR::Node * node, TR::CodeGenerator * cg)
TR::TreeTop * nextTT = cg->getCurrentEvaluationTreeTop()->getNextTreeTop();
TR::RegisterDependencyConditions * deps = NULL;

lastInstr = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node, deps,
lastInstr = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node, deps,
TR::Node::createRelative32BitFenceNode(node, &block->getInstructionBoundaries()._endPC));

if (!nextTT || !nextTT->getNode()->getBlock()->isExtensionOfPreviousBlock())
Expand Down Expand Up @@ -11666,19 +11666,19 @@ OMR::Z::TreeEvaluator::barrierFenceEvaluator(TR::Node * node, TR::CodeGenerator
if (opCode == TR::loadFence)
{
// create fence nop
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node, (TR::Node *) NULL);
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node, (TR::Node *) NULL);
}
else if (opCode == TR::storeFence)
{
// create fence nop
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node, (TR::Node *) NULL);
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node, (TR::Node *) NULL);
}
else if (opCode == TR::fullFence)
{
if (node->canOmitSync())
{
// create fence nop
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::FENCE, node, (TR::Node *) NULL);
fenceInstruction = generateS390PseudoInstruction(cg, TR::InstOpCode::fence, node, (TR::Node *) NULL);
}
else
{
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2 changes: 1 addition & 1 deletion compiler/z/codegen/S390Debug.cpp
View file
Expand Up @@ -882,7 +882,7 @@ TR_Debug::print(TR::FILE *pOutFile, TR::S390PseudoInstruction * instr)
trfprintf(pOutFile, ", Debug Counter Bump");
}

if (instr->getOpCodeValue() == TR::InstOpCode::FENCE)
if (instr->getOpCodeValue() == TR::InstOpCode::fence)
{
if (instr->getFenceNode() != NULL)
{
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2 changes: 1 addition & 1 deletion compiler/z/codegen/snippet/PPA1Snippet.cpp
View file
Expand Up @@ -101,7 +101,7 @@ TR::PPA1Snippet::emitSnippetBody()

TR::Instruction* prologueEnd = prologueBegin;

while (prologueEnd != NULL && prologueEnd->getOpCodeValue() != TR::InstOpCode::FENCE)
while (prologueEnd != NULL && prologueEnd->getOpCodeValue() != TR::InstOpCode::fence)
{
prologueEnd = prologueEnd->getNext();
}
Expand Down

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