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Remove unused IL opcodes
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There are no known producers or consumers of these opcodes.

* `TR::ixfrs`
* `TR::lxfrs`
* `TR::fxfrs`
* `TR::dxfrs`
* `TR::fint`
* `TR::dint`
* `TR::fnint`
* `TR::dnint`

Issue: #5914

Signed-off-by: Daryl Maier <maier@ca.ibm.com>
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0xdaryl committed Apr 26, 2021
1 parent 708cf01 commit 9b3534b
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Showing 17 changed files with 0 additions and 494 deletions.
8 changes: 0 additions & 8 deletions compiler/aarch64/codegen/OMRTreeEvaluator.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -673,14 +673,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *ilatomicorEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *branchEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *igotoEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *ixfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *lxfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *fxfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *dxfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *fintEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *dintEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *fnintEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *dnintEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *fsqrtEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *dsqrtEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *dfloorEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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8 changes: 0 additions & 8 deletions compiler/aarch64/codegen/OMRTreeEvaluatorTable.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -650,14 +650,6 @@
#define _ilatomicorEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _branchEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _igotoEvaluator TR::TreeEvaluator::igotoEvaluator
#define _ixfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _lxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fnintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dnintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fsqrtEvaluator TR::TreeEvaluator::fsqrtEvaluator
#define _dsqrtEvaluator TR::TreeEvaluator::dsqrtEvaluator
#define _dfloorEvaluator TR::TreeEvaluator::unImpOpEvaluator
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8 changes: 0 additions & 8 deletions compiler/arm/codegen/OMRTreeEvaluatorTable.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -651,14 +651,6 @@
#define _ilatomicorEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _branchEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _igotoEvaluator TR::TreeEvaluator::igotoEvaluator
#define _ixfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _lxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dxfrsEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fnintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dnintEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _fsqrtEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dsqrtEvaluator TR::TreeEvaluator::unImpOpEvaluator
#define _dfloorEvaluator TR::TreeEvaluator::unImpOpEvaluator
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128 changes: 0 additions & 128 deletions compiler/il/OMROpcodes.enum
Original file line number Diff line number Diff line change
Expand Up @@ -10035,134 +10035,6 @@ OPCODE_MACRO(\
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = indirect goto, branches to the address specified by a child */ \
)
OPCODE_MACRO(\
/* .opcode = */ ixfrs, \
/* .name = */ "ixfrs", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Int32, \
/* .typeProperties = */ ILTypeProp::Size_4 | ILTypeProp::Integer, \
/* .childProperties = */ ILChildProp::Unspecified, \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = transfer sign integer */ \
)
OPCODE_MACRO(\
/* .opcode = */ lxfrs, \
/* .name = */ "lxfrs", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Int64, \
/* .typeProperties = */ ILTypeProp::Size_8 | ILTypeProp::Integer, \
/* .childProperties = */ ILChildProp::Unspecified, \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = transfer sign long */ \
)
OPCODE_MACRO(\
/* .opcode = */ fxfrs, \
/* .name = */ "fxfrs", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Float, \
/* .typeProperties = */ ILTypeProp::Size_4 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ILChildProp::Unspecified, \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = transfer sign float */ \
)
OPCODE_MACRO(\
/* .opcode = */ dxfrs, \
/* .name = */ "dxfrs", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Double, \
/* .typeProperties = */ ILTypeProp::Size_8 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ILChildProp::Unspecified, \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = transfer sign double */ \
)
OPCODE_MACRO(\
/* .opcode = */ fint, \
/* .name = */ "fint", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Float, \
/* .typeProperties = */ ILTypeProp::Size_4 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ONE_CHILD(TR::Float), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = truncate float to int */ \
)
OPCODE_MACRO(\
/* .opcode = */ dint, \
/* .name = */ "dint", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Double, \
/* .typeProperties = */ ILTypeProp::Size_8 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ONE_CHILD(TR::Double), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = truncate double to int */ \
)
OPCODE_MACRO(\
/* .opcode = */ fnint, \
/* .name = */ "fnint", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Float, \
/* .typeProperties = */ ILTypeProp::Size_4 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ONE_CHILD(TR::Float), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = round float to nearest int */ \
)
OPCODE_MACRO(\
/* .opcode = */ dnint, \
/* .name = */ "dnint", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ 0, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::Double, \
/* .typeProperties = */ ILTypeProp::Size_8 | ILTypeProp::Floating_Point, \
/* .childProperties = */ ONE_CHILD(TR::Double), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = round double to nearest int */ \
)
OPCODE_MACRO(\
/* .opcode = */ fsqrt, \
/* .name = */ "fsqrt", \
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8 changes: 0 additions & 8 deletions compiler/optimizer/OMRSimplifierTable.enum
Original file line number Diff line number Diff line change
Expand Up @@ -649,14 +649,6 @@
#define ilatomicorSimplifierHandler dftSimplifier
#define branchSimplifierHandler dftSimplifier
#define igotoSimplifierHandler dftSimplifier
#define ixfrsSimplifierHandler dftSimplifier
#define lxfrsSimplifierHandler dftSimplifier
#define fxfrsSimplifierHandler dftSimplifier
#define dxfrsSimplifierHandler dftSimplifier
#define fintSimplifierHandler dftSimplifier
#define dintSimplifierHandler dftSimplifier
#define fnintSimplifierHandler dftSimplifier
#define dnintSimplifierHandler dftSimplifier
#define fsqrtSimplifierHandler fsqrtSimplifier
#define dsqrtSimplifierHandler dsqrtSimplifier
#define dfloorSimplifierHandler dftSimplifier
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8 changes: 0 additions & 8 deletions compiler/optimizer/ValuePropagationTable.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -791,14 +791,6 @@ TR::Node * constrainLongBitCount(OMR::ValuePropagation *vp, TR::Node *node);
#define ilatomicorVPHandler constrainChildren
#define branchVPHandler constrainCondBranch
#define igotoVPHandler constrainIgoto
#define ixfrsVPHandler constrainChildren
#define lxfrsVPHandler constrainChildren
#define fxfrsVPHandler constrainChildren
#define dxfrsVPHandler constrainChildren
#define fintVPHandler constrainChildren
#define dintVPHandler constrainChildren
#define fnintVPHandler constrainChildren
#define dnintVPHandler constrainChildren
#define fsqrtVPHandler constrainChildren
#define dsqrtVPHandler constrainChildren
#define dfloorVPHandler constrainChildren
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81 changes: 0 additions & 81 deletions compiler/p/codegen/BinaryEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3466,84 +3466,3 @@ TR::Register *OMR::Power::TreeEvaluator::ixorEvaluator(TR::Node *node, TR::CodeG
{
return iorTypeEvaluator(node, TR::InstOpCode::xori, TR::InstOpCode::xoris, TR::InstOpCode::XOR, TR::InstOpCode::xor_r, cg);
}

TR::Register *OMR::Power::TreeEvaluator::ixfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
TR::Node * firstChild = node->getFirstChild();
TR::Node * secondChild = node->getSecondChild();
TR::Register *src1Reg = cg->evaluate(firstChild);
TR::Register *src2Reg = cg->evaluate(secondChild);

TR::Register *trgReg = cg->allocateRegister();
TR::Register *tmp1Reg = cg->allocateRegister();
TR::Register *tmp2Reg = cg->allocateRegister();

generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp1Reg, src1Reg, 31);
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp2Reg, src2Reg, 31);
// trg = absolute value of the first child
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg, src1Reg, tmp1Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, trgReg, tmp1Reg, trgReg);
// apply sign of the second child to trg
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg, trgReg, tmp2Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, trgReg, tmp2Reg, trgReg);

cg->stopUsingRegister(tmp1Reg);
cg->stopUsingRegister(tmp2Reg);

node->setRegister(trgReg);
cg->decReferenceCount(firstChild);
cg->decReferenceCount(secondChild);
return trgReg;
}


TR::Register *OMR::Power::TreeEvaluator::lxfrsEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
TR::Node * firstChild = node->getFirstChild();
TR::Node * secondChild = node->getSecondChild();
TR::Register *src1Reg = cg->evaluate(firstChild);
TR::Register *src2Reg = cg->evaluate(secondChild);
TR::Register *tmp1Reg = cg->allocateRegister();
TR::Register *tmp2Reg = cg->allocateRegister();
TR::Register *trgReg;

if (cg->comp()->target().is32Bit())
{
TR::Register *lowReg = cg->allocateRegister();
TR::Register *highReg = cg->allocateRegister();
trgReg = cg->allocateRegisterPair(lowReg, highReg);

generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp1Reg, src1Reg->getHighOrder(), 31);
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp2Reg, src2Reg->getHighOrder(), 31);
// trg = absolute value of the first child
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg->getLowOrder(), src1Reg->getLowOrder(), tmp1Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg->getHighOrder(), src1Reg->getHighOrder(), tmp1Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subfc, node, trgReg->getLowOrder(), tmp1Reg, trgReg->getLowOrder());
generateTrg1Src2Instruction(cg, TR::InstOpCode::subfe, node, trgReg->getHighOrder(), tmp1Reg, trgReg->getHighOrder());
// apply sign of the second child to trg
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg->getLowOrder(), trgReg->getLowOrder(), tmp2Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg->getHighOrder(), trgReg->getHighOrder(), tmp2Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subfc, node, trgReg->getLowOrder(), tmp2Reg, trgReg->getLowOrder());
generateTrg1Src2Instruction(cg, TR::InstOpCode::subfe, node, trgReg->getHighOrder(), tmp2Reg, trgReg->getHighOrder());
}
else
{
trgReg = cg->allocateRegister();
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp1Reg, src1Reg, 31);
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tmp2Reg, src2Reg, 31);
// trg = absolute value of the first child
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg, src1Reg, tmp1Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, trgReg, tmp1Reg, trgReg);
// apply sign of the second child to trg
generateTrg1Src2Instruction(cg, TR::InstOpCode::XOR, node, trgReg, trgReg, tmp2Reg);
generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, trgReg, tmp2Reg, trgReg);
}

cg->stopUsingRegister(tmp1Reg);
cg->stopUsingRegister(tmp2Reg);

node->setRegister(trgReg);
cg->decReferenceCount(firstChild);
cg->decReferenceCount(secondChild);
return trgReg;
}
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