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Remove vdmadd/vdmsub/vdnmsub IL opcodes
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Issue: #6003

Signed-off-by: Daryl Maier <maier@ca.ibm.com>
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@0xdaryl
0xdaryl committed Jun 2, 2021
1 parent 788c38c commit 9d1ec65
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Showing 17 changed files with 0 additions and 243 deletions.
18 changes: 0 additions & 18 deletions compiler/aarch64/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1280,24 +1280,6 @@ OMR::ARM64::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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3 changes: 0 additions & 3 deletions compiler/aarch64/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -608,9 +608,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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18 changes: 0 additions & 18 deletions compiler/arm/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1591,24 +1591,6 @@ OMR::ARM::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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3 changes: 0 additions & 3 deletions compiler/arm/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -315,9 +315,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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48 changes: 0 additions & 48 deletions compiler/il/OMROpcodes.enum
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Expand Up @@ -6611,54 +6611,6 @@ OPCODE_MACRO(\
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = get vector select double */ \
)
OPCODE_MACRO(\
/* .opcode = */ vdmadd, \
/* .name = */ "vdmadd", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ ILProp3::LikeUse, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::VectorDouble, \
/* .typeProperties = */ ILTypeProp::Size_16 | ILTypeProp::Floating_Point | ILTypeProp::Vector, \
/* .childProperties = */ TWO_SAME_CHILD(ILChildProp::UnspecifiedChildType), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = vector double fused multiply add */ \
)
OPCODE_MACRO(\
/* .opcode = */ vdnmsub, \
/* .name = */ "vdnmsub", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ ILProp3::LikeUse, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::VectorDouble, \
/* .typeProperties = */ ILTypeProp::Size_16 | ILTypeProp::Floating_Point | ILTypeProp::Vector, \
/* .childProperties = */ TWO_SAME_CHILD(ILChildProp::UnspecifiedChildType), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = vector double fused negative multiply subtract */ \
)
OPCODE_MACRO(\
/* .opcode = */ vdmsub, \
/* .name = */ "vdmsub", \
/* .properties1 = */ 0, \
/* .properties2 = */ ILProp2::ValueNumberShare | ILProp2::SupportedForPRE, \
/* .properties3 = */ ILProp3::LikeUse, \
/* .properties4 = */ 0, \
/* .dataType = */ TR::VectorDouble, \
/* .typeProperties = */ ILTypeProp::Size_16 | ILTypeProp::Floating_Point | ILTypeProp::Vector, \
/* .childProperties = */ TWO_SAME_CHILD(ILChildProp::UnspecifiedChildType), \
/* .swapChildrenOpCode = */ TR::BadILOp, \
/* .reverseBranchOpCode = */ TR::BadILOp, \
/* .booleanCompareOpCode = */ TR::BadILOp, \
/* .ifCompareOpCode = */ TR::BadILOp, \
/* .description = vector double fused multiply subtract */ \
)
OPCODE_MACRO(\
/* .opcode = */ vdmax, \
/* .name = */ "vdmax", \
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3 changes: 0 additions & 3 deletions compiler/optimizer/OMRSimplifierTable.enum
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Expand Up @@ -435,9 +435,6 @@
#define vdsetelemSimplifierHandler dftSimplifier
#define vdgetelemSimplifierHandler dftSimplifier
#define vdselSimplifierHandler dftSimplifier
#define vdmaddSimplifierHandler dftSimplifier
#define vdnmsubSimplifierHandler dftSimplifier
#define vdmsubSimplifierHandler dftSimplifier
#define vdmaxSimplifierHandler dftSimplifier
#define vdminSimplifierHandler dftSimplifier
#define vdcmpeqSimplifierHandler normalizeCmpSimplifier
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3 changes: 0 additions & 3 deletions compiler/optimizer/ValuePropagationTable.hpp
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Expand Up @@ -577,9 +577,6 @@ TR::Node * constrainLongBitCount(OMR::ValuePropagation *vp, TR::Node *node);
#define vdsetelemVPHandler constrainChildren
#define vdgetelemVPHandler constrainChildren
#define vdselVPHandler constrainChildren
#define vdmaddVPHandler constrainChildren
#define vdnmsubVPHandler constrainChildren
#define vdmsubVPHandler constrainChildren
#define vdmaxVPHandler constrainChildren
#define vdminVPHandler constrainChildren
#define vdcmpeqVPHandler constrainCmp
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15 changes: 0 additions & 15 deletions compiler/p/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -3364,21 +3364,6 @@ TR::Register *OMR::Power::TreeEvaluator::vimergeEvaluator(TR::Node *node, TR::Co
return resReg;
}

TR::Register *OMR::Power::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::inlineVectorBitSelectOp(node, cg, TR::InstOpCode::xvmaddadp);
}

TR::Register *OMR::Power::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::inlineVectorBitSelectOp(node, cg, TR::InstOpCode::xvnmsubadp);
}

TR::Register *OMR::Power::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::inlineVectorBitSelectOp(node, cg, TR::InstOpCode::xvmsubadp);
}

TR::Register *OMR::Power::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::inlineVectorBitSelectOp(node, cg, TR::InstOpCode::xxsel);
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3 changes: 0 additions & 3 deletions compiler/p/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -650,9 +650,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *getvelemMemoryMoveHelper(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *visetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vimergeEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vsplatsEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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18 changes: 0 additions & 18 deletions compiler/riscv/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1431,24 +1431,6 @@ OMR::RV::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::RV::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::RV::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::RV::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::RV::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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3 changes: 0 additions & 3 deletions compiler/riscv/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -333,9 +333,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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18 changes: 0 additions & 18 deletions compiler/x/amd64/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1643,24 +1643,6 @@ OMR::X86::AMD64::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::AMD64::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::AMD64::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::AMD64::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::AMD64::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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3 changes: 0 additions & 3 deletions compiler/x/amd64/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -317,9 +317,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::X86::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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18 changes: 0 additions & 18 deletions compiler/x/i386/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1741,24 +1741,6 @@ OMR::X86::I386::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::I386::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::I386::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::I386::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::X86::I386::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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3 changes: 0 additions & 3 deletions compiler/x/i386/codegen/OMRTreeEvaluator.hpp
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Expand Up @@ -298,9 +298,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::X86::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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62 changes: 0 additions & 62 deletions compiler/z/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -1310,18 +1310,6 @@ OMR::Z::TreeEvaluator::vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::Z::TreeEvaluator::vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::Z::TreeEvaluator::vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::Z::TreeEvaluator::vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
Expand Down Expand Up @@ -14826,50 +14814,6 @@ OMR::Z::TreeEvaluator::inlineVectorBinaryOp(TR::Node * node, TR::CodeGenerator *
return targetReg;
}

TR::Register *
OMR::Z::TreeEvaluator::inlineVectorBitSelectOp(TR::Node * node, TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op)
{
TR_ASSERT(node->getNumChildren() >= 3,"Select Node must contain 3 or more children");
// TODO Bullet proof this code better and handle more children better.
TR::Node *firstChild = node->getFirstChild();
TR::Node *secondChild = node->getSecondChild();
TR::Node *thirdChild = node->getThirdChild();

TR::Register *targetReg = TR::TreeEvaluator::tryToReuseInputVectorRegs(node, cg);

TR::Register *sourceReg1 = cg->evaluate(firstChild);
TR::Register *sourceReg2 = cg->evaluate(secondChild);
TR::Register *sourceReg3 = cg->evaluate(thirdChild);

// !!! Masks change per instruction. *Ref to zPoP for masks* !!!
uint8_t mask3 = 0;
uint8_t mask4 = 0;
uint8_t mask5 = 0;

node->setRegister(targetReg);

switch (op)
{
case TR::InstOpCode::VMAL:
case TR::InstOpCode::VMAH:
mask5 = 0x2; // mask5 = 0x2 --> word element size (mul makes it double-word)
// RA does allow for source registers 1 & 2 to be re-used as target
breakInst = generateVRRdInstruction(cg, op, node, targetReg, sourceReg1, sourceReg2, sourceReg3, 0, mask5);
break;
case TR::InstOpCode::VFMA:
breakInst = generateVRReInstruction(cg, op, node, targetReg, sourceReg1, sourceReg2, sourceReg3, 3, mask5);
break;
default:
TR_ASSERT(false, "Select Vector IL evaluation unimplemented for node : %s", cg->getDebug()->getName(node));
}

cg->decReferenceCount(firstChild);
cg->decReferenceCount(secondChild);
cg->decReferenceCount(thirdChild);

return targetReg;
}

TR::Register *
OMR::Z::TreeEvaluator::vloadEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
Expand Down Expand Up @@ -14958,12 +14902,6 @@ OMR::Z::TreeEvaluator::vstoreEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return NULL;
}

TR::Register *
OMR::Z::TreeEvaluator::vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::inlineVectorBitSelectOp(node, cg, TR::InstOpCode::VFMA);
}

TR::Register *
OMR::Z::TreeEvaluator::vselEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
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4 changes: 0 additions & 4 deletions compiler/z/codegen/OMRTreeEvaluator.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -284,8 +284,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *vdsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdgetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdselEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdnmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmsubEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdmaxEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdminEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vdcmpeqEvaluator(TR::Node *node, TR::CodeGenerator *cg);
Expand Down Expand Up @@ -723,7 +721,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator

static TR::Register *vselEvaluator(TR::Node *node, TR::CodeGenerator *cg);

static TR::Register *vdmaddEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vloadEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vRegLoadEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *vRegStoreEvaluator(TR::Node *node, TR::CodeGenerator *cg);
Expand Down Expand Up @@ -752,7 +749,6 @@ class OMR_EXTENSIBLE TreeEvaluator: public OMR::TreeEvaluator
static TR::Register *vsetelemEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *inlineVectorUnaryOp(TR::Node * node, TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op);
static TR::Register *inlineVectorBinaryOp(TR::Node * node, TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op);
static TR::Register *inlineVectorBitSelectOp(TR::Node * node, TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op);

static TR::Register *sbyteswapEvaluator(TR::Node *node, TR::CodeGenerator *cg);
static TR::Register *ibyteswapEvaluator(TR::Node *node, TR::CodeGenerator *cg);
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