Skip to content

Commit

Permalink
Remove the iselect control flow instruction
Browse files Browse the repository at this point in the history
The previous implementation of iselect node evaluation used a control
flow instruction called iselect to implement its control flow. Since the
new implementation uses ICF instead, this instruction is no longer
needed.

Signed-off-by: Ben Thomas <ben@benthomas.ca>
  • Loading branch information
aviansie-ben committed Sep 2, 2020
1 parent 2f1baf8 commit bcd8e57
Show file tree
Hide file tree
Showing 4 changed files with 0 additions and 57 deletions.
1 change: 0 additions & 1 deletion compiler/p/codegen/OMRInstOpCodeEnum.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -555,7 +555,6 @@
lrem, // long remainder for 64 bit target
d2i, // converts from double to integer
d2l, // converts from double to long
iselect, // select evaluator
// bcdcpsgn_r, // Decimal copySign & record
// bcdcfn_r, // Decimal convert from national & record
// bcdcfsq_r, // Decimal convert from signed qword & record
Expand Down
11 changes: 0 additions & 11 deletions compiler/p/codegen/OMRInstOpCodeProperties.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -6367,17 +6367,6 @@
/* .properties = */ PPCOpProp_None,
},

{
/* .mnemonic = */ OMR::InstOpCode::iselect,
/* .name = */ "iselect",
/* .description = "select evaluator", */
/* .prefix = */ 0x00000000,
/* .opcode = */ 0x00000000,
/* .format = */ FORMAT_UNKNOWN,
/* .minimumALS = */ OMR_PROCESSOR_PPC_UNKNOWN,
/* .properties = */ PPCOpProp_None,
},

/* { */
/* .mnemonic = OMR::InstOpCode::bcdcpsgn_r, */
/* .name = "bcdcpsgn.", */
Expand Down
1 change: 0 additions & 1 deletion compiler/p/codegen/PPCBinaryEncoding.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2474,7 +2474,6 @@ int32_t TR::PPCControlFlowInstruction::estimateBinaryLength(int32_t currentEstim
case TR::InstOpCode::iflong:
case TR::InstOpCode::idiv:
case TR::InstOpCode::ldiv:
case TR::InstOpCode::iselect:
if (useRegPairForResult())
{
if (!useRegPairForCond())
Expand Down
44 changes: 0 additions & 44 deletions compiler/p/codegen/PPCInstruction.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1478,50 +1478,6 @@ void TR::PPCControlFlowInstruction::assignRegisters(TR_RegisterKinds kindToBeAss
}
cg()->traceRAInstruction(cursor = generateLabelInstruction(cg(), TR::InstOpCode::label, currentNode, label2, cursor));

break;
case TR::InstOpCode::iselect:
{
cg()->traceRAInstruction(cursor = generateTrg1Src1ImmInstruction(cg(), TR::InstOpCode::cmpi4, currentNode, getTargetRegister(0), getSourceRegister(0), 0, cursor));

if (useRegPairForResult())
{
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(1), getSourceRegister(1), cursor));
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(2), getSourceRegister(2), cursor));
}
else
{
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(1), getSourceRegister(1), cursor));
}
cg()->traceRAInstruction(cursor = generateConditionalBranchInstruction(cg(), TR::InstOpCode::bne, currentNode, label2, getTargetRegister(0), cursor));

if (useRegPairForResult())
{
if (useRegPairForCond())
{
cg()->traceRAInstruction(cursor = generateTrg1Src1ImmInstruction(cg(), TR::InstOpCode::cmpi4, currentNode, getTargetRegister(0), getSourceRegister(5), 0, cursor));
cg()->traceRAInstruction(cursor = generateConditionalBranchInstruction(cg(), TR::InstOpCode::bne, currentNode, label2, getTargetRegister(0), cursor));
}
}
else
{
if (useRegPairForCond())
{
cg()->traceRAInstruction(cursor = generateTrg1Src1ImmInstruction(cg(), TR::InstOpCode::cmpi4, currentNode, getTargetRegister(0), getSourceRegister(3), 0, cursor));
cg()->traceRAInstruction(cursor = generateConditionalBranchInstruction(cg(), TR::InstOpCode::bne, currentNode, label2, getTargetRegister(0), cursor));
}
}

if (useRegPairForResult())
{
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(1), getSourceRegister(3), cursor));
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(2), getSourceRegister(4), cursor));
}
else
{
cg()->traceRAInstruction(cursor = generateTrg1Src1Instruction (cg(), getOpCode2Value(), currentNode, getTargetRegister(1), getSourceRegister(2), cursor));
}
cg()->traceRAInstruction(cursor = generateLabelInstruction (cg(), TR::InstOpCode::label,currentNode, label2, cursor));
}
break;
default:
TR_ASSERT(false,"unknown control flow instruction ");
Expand Down

0 comments on commit bcd8e57

Please sign in to comment.