Contribution to OMR build system for shared cache configuration

This commit introduces a top-level directory for Shared Cache. The files mentioned in sharedcache/CMakeLists.txt will be moved in later PR's. Introduction of OMR_SHARED_CACHE as a top-level directory flag, necessitated changes to multiple configure/mk/in files. Also included in this commit are: * additions to the CMake build system needed to build the shared cache, and * additions to TRMemory.(hpp/cpp) and omrmemcategories.h for shared cache object types and memory categories Issue: #4610 Co-authored-by: Mark Thom <markjordanthom@gmail.com> Co-authored-by: Damian Diago D'monte <damian.dmonte@unb.ca> Signed-off-by: Damian Diago D'monte <damian.dmonte@unb.ca>
eclipse · Dec 4, 2020 · d144c3e · d144c3e
1 parent 5080dab
commit d144c3e
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Showing 10 changed files with 101 additions and 3 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -203,6 +203,10 @@ if(OMR_JITBUILDER)
 	add_subdirectory(jitbuilder)
 endif(OMR_JITBUILDER)
 
+if(OMR_SHARED_CACHE)
+	add_subdirectory(sharedcache)
+endif(OMR_SHARED_CACHE)
+
 # This should come last to ensure dependencies
 # are defined
 if(OMR_FVTEST)

diff --git a/cmake/config.cmake b/cmake/config.cmake
@@ -45,6 +45,7 @@ set(OMR_COMPILER OFF CACHE BOOL "Enable the Compiler")
 set(OMR_JITBUILDER OFF CACHE BOOL "Enable building JitBuilder")
 set(OMR_TEST_COMPILER OFF CACHE BOOL "Enable building the test compiler")
 set(OMR_LLJB OFF CACHE BOOL "Enable building LLJB")
+set(OMR_SHARED_CACHE OFF CACHE BOOL "Enable the Shared Cache")
 
 set(OMR_GC ON CACHE BOOL "Enable the GC")
 set(OMR_GC_TEST ${OMR_GC} CACHE BOOL "Enable the GC tests.")

diff --git a/compiler/env/TRMemory.cpp b/compiler/env/TRMemory.cpp
@@ -281,6 +281,9 @@ const char * objectName[] =
    "TR::RelocationDebugInfo",
    "TR::AOTClassInfo",
    "TR_SharedCache",
+   "SharedCacheRegion",
+   "SharedCacheLayout",
+   "SharedCacheConfig",
 
    "TR::RegisterPair",
    "TR::Instruction",

diff --git a/compiler/env/TRMemory.hpp b/compiler/env/TRMemory.hpp
@@ -427,6 +427,9 @@ class TR_MemoryBase
       RelocationDebugInfo,
       AOTClassInfo,
       SharedCache,
+      SharedCacheRegion,
+      SharedCacheLayout,
+      SharedCacheConfig,
 
       RegisterPair,
       S390Instruction,

diff --git a/include_core/omrcfg.cmake.h.in b/include_core/omrcfg.cmake.h.in
@@ -41,6 +41,7 @@
 #cmakedefine OMR_THREAD
 #cmakedefine OMR_OMRSIG
 #cmakedefine OMR_EXAMPLE
+#cmakedefine OMR_SHARED_CACHE
 
 #cmakedefine OMR_GC_ALLOCATION_TAX
 #cmakedefine OMR_GC_BATCH_CLEAR_TLH

diff --git a/include_core/omrcfg.h.in b/include_core/omrcfg.h.in
@@ -42,6 +42,7 @@
 #undef OMR_THREAD
 #undef OMR_OMRSIG
 #undef OMR_EXAMPLE
+#undef OMR_SHARED_CACHE
 
 #undef OMR_GC_ALLOCATION_TAX
 #undef OMR_GC_OBJECT_ALLOCATION_NOTIFY

diff --git a/include_core/omrmemcategories.h b/include_core/omrmemcategories.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2010, 2019 IBM Corp. and others
+ * Copyright (c) 2010, 2020 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -85,6 +85,11 @@ typedef struct OMRMemCategorySet {
 #define OMRMEM_CATEGORY_CUDA 0x80000010
 #endif /* OMR_OPT_CUDA */
 
+#if defined(OMR_SHARED_CACHE)
+#define OMRMEM_CATEGORY_CLASSES 0x80000011
+#define OMRMEM_CATEGORY_CLASSES_SHC_CACHE 0x80000012
+#endif /* OMR_SHARED_CACHE */
+
 /* Helper macro to convert the category codes to indices starting from 0 */
 #define OMRMEM_LANGUAGE_CATEGORY_LIMIT 0x7FFFFFFF
 #define OMRMEM_OMR_CATEGORY_INDEX_FROM_CODE(code) (((uint32_t)0x7FFFFFFF) & (code))

diff --git a/omr/startup/omrrasinit.c b/omr/startup/omrrasinit.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2014, 2018 IBM Corp. and others
+ * Copyright (c) 2014, 2020 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -55,7 +55,10 @@ OMRMEM_CATEGORY_NO_CHILDREN("JIT Data Cache", OMRMEM_CATEGORY_JIT_DATA_CACHE);
 #if defined(OMR_OPT_CUDA)
 OMRMEM_CATEGORY_NO_CHILDREN("CUDA", OMRMEM_CATEGORY_CUDA);
 #endif /* OMR_OPT_CUDA */
-
+#if defined(OMR_SHARED_CACHE)
+OMRMEM_CATEGORY_1_CHILD("Classes", OMRMEM_CATEGORY_CLASSES, OMRMEM_CATEGORY_CLASSES_SHC_CACHE);
+OMRMEM_CATEGORY_NO_CHILDREN("Shared Cache", OMRMEM_CATEGORY_CLASSES_SHC_CACHE);
+#endif /* OMR_SHARED_CACHE */
 
 omr_error_t
 omr_ras_initMemCategories(OMRPortLibrary *portLibrary)
@@ -88,6 +91,10 @@ omr_ras_initMemCategories(OMRPortLibrary *portLibrary)
 #if defined(OMR_OPT_CUDA)
 		CATEGORY_TABLE_ENTRY(OMRMEM_CATEGORY_CUDA),
 #endif /* OMR_OPT_CUDA */
+#if defined(OMR_SHARED_CACHE)
+		CATEGORY_TABLE_ENTRY(OMRMEM_CATEGORY_CLASSES), 
+		CATEGORY_TABLE_ENTRY(OMRMEM_CATEGORY_CLASSES_SHC_CACHE),
+#endif /* OMR_SHARED_CACHE */
 	};
 	OMRMemCategorySet memCategorySet = { sizeof(memCategories) / sizeof(memCategories[0]), memCategories };
 	omr_error_t rc = OMR_ERROR_NONE;

diff --git a/omrmakefiles/configure.mk.in b/omrmakefiles/configure.mk.in
@@ -87,6 +87,7 @@ OMR_PORT_NUMA_SUPPORT := @OMR_PORT_NUMA_SUPPORT@
 OMR_PORT_ZOS_CEEHDLRSUPPORT := @OMR_PORT_ZOS_CEEHDLRSUPPORT@
 OMRPORT_OMRSIG_SUPPORT := @OMRPORT_OMRSIG_SUPPORT@
 OMR_RAS_TDF_TRACE := @OMR_RAS_TDF_TRACE@
+OMR_SHARED_CACHE := @OMR_SHARED_CACHE@
 OMR_TEST_COMPILER := @OMR_TEST_COMPILER@
 OMR_THR_ADAPTIVE_SPIN := @OMR_THR_ADAPTIVE_SPIN@
 OMR_THR_CUSTOM_SPIN_OPTIONS := @OMR_THR_CUSTOM_SPIN_OPTIONS@

diff --git a/sharedcache/CMakeLists.txt b/sharedcache/CMakeLists.txt
@@ -0,0 +1,72 @@
+################################################################################
+# Copyright (c) 2020, 2020 IBM Corp. and others
+#
+# This program and the accompanying materials are made available under
+# the terms of the Eclipse Public License 2.0 which accompanies this
+# distribution and is available at https://www.eclipse.org/legal/epl-2.0/
+# or the Apache License, Version 2.0 which accompanies this distribution and
+# is available at https://www.apache.org/licenses/LICENSE-2.0.
+#
+# This Source Code may also be made available under the following
+# Secondary Licenses when the conditions for such availability set
+# forth in the Eclipse Public License, v. 2.0 are satisfied: GNU
+# General Public License, version 2 with the GNU Classpath
+# Exception [1] and GNU General Public License, version 2 with the
+# OpenJDK Assembly Exception [2].
+#
+# [1] https://www.gnu.org/software/classpath/license.html
+# [2] http://openjdk.java.net/legal/assembly-exception.html
+#
+# SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0 WITH Classpath-exception-2.0 OR LicenseRef-GPL-2.0 WITH Assembly-exception
+################################################################################
+
+omr_add_tracegen(include/omrshr.tdf)
+
+add_library(sharedcache STATIC
+	OSCacheConfigOptions.cpp
+	OSCacheImpl.cpp
+	OSCacheUtils.cpp
+	OSMemoryMappedCacheIterator.cpp
+	OSMemoryMappedCache.cpp
+	OSMemoryMappedCacheAttachingContext.cpp
+	OSMemoryMappedCacheCreatingContext.cpp
+	OSMemoryMappedCacheConfig.cpp
+	OSMemoryMappedCacheHeader.cpp
+	OSMemoryMappedCacheStats.cpp
+	OSMemoryMappedCacheUtils.cpp
+	OSSharedMemoryCacheIterator.cpp
+	OSSharedMemoryCachePolicies.cpp
+	OSSharedMemoryCache.cpp  
+	OSSharedMemoryCacheConfig.cpp
+	OSSharedMemoryCacheHeader.cpp
+	OSSharedMemoryCacheStats.cpp
+	OSSharedMemoryCacheUtils.cpp
+	CacheCRCChecker.cpp
+	SynchronizedCacheCounter.cpp
+	OSCacheLayout.cpp
+	OSCacheContiguousRegion.cpp
+	OSMemoryMappedCacheMemoryProtector.cpp
+	OSSharedMemoryCacheMemoryProtector.cpp  
+	${CMAKE_CURRENT_BINARY_DIR}/ut_omrshr.c
+)
+
+target_include_directories(sharedcache
+	PRIVATE
+		${PROJECT_SOURCE_DIR}/nls
+		${PROJECT_SOURCE_DIR}/include_core
+		${PROJECT_SOURCE_DIR}/port/unix
+		${PROJECT_SOURCE_DIR}/sharedcache
+	PUBLIC
+		${PROJECT_SOURCE_DIR}/compiler
+		${CMAKE_CURRENT_BINARY_DIR}
+		include
+		.
+)
+
+target_link_libraries(sharedcache
+	PRIVATE
+		j9pool
+		j9hashtable
+)
+
+target_compile_options(sharedcache PUBLIC -fexceptions)