Remove default CodeGenerator constructor

All object instantiations should now happen via the create() function. Remove duplicate and obsolete code. Signed-off-by: Daryl Maier <maier@ca.ibm.com>
eclipse · Nov 3, 2020 · e7f47df · e7f47df
1 parent bc1c204
commit e7f47df
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Showing 19 changed files with 1 addition and 1,108 deletions.
diff --git a/compiler/aarch64/codegen/OMRCodeGenerator.cpp b/compiler/aarch64/codegen/OMRCodeGenerator.cpp
@@ -156,112 +156,6 @@ OMR::ARM64::CodeGenerator::initialize()
       cg->setEnforceStoreOrder();
    }
 
-OMR::ARM64::CodeGenerator::CodeGenerator() :
-      OMR::CodeGenerator(),
-      _dataSnippetList(getTypedAllocator<TR::ARM64ConstantDataSnippet*>(TR::comp()->allocator())),
-      _outOfLineCodeSectionList(getTypedAllocator<TR_ARM64OutOfLineCodeSection*>(self()->comp()->allocator())),
-      _firstTimeLiveOOLRegisterList(NULL)
-   {
-   // Initialize Linkage for Code Generator
-   self()->initializeLinkage();
-
-   _unlatchedRegisterList =
-      (TR::RealRegister**)self()->trMemory()->allocateHeapMemory(sizeof(TR::RealRegister*)*(TR::RealRegister::NumRegisters + 1));
-
-   _unlatchedRegisterList[0] = 0; // mark that list is empty
-
-   _linkageProperties = &self()->getLinkage()->getProperties();
-
-   self()->setStackPointerRegister(self()->machine()->getRealRegister(_linkageProperties->getStackPointerRegister()));
-   self()->setMethodMetaDataRegister(self()->machine()->getRealRegister(_linkageProperties->getMethodMetaDataRegister()));
-
-   // Tactical GRA settings
-   //
-   self()->setGlobalRegisterTable(_linkageProperties->getRegisterAllocationOrder());
-   _numGPR = _linkageProperties->getNumAllocatableIntegerRegisters();
-   _numFPR = _linkageProperties->getNumAllocatableFloatRegisters();
-   self()->setLastGlobalGPR(_numGPR - 1);
-   self()->setLastGlobalFPR(_numGPR + _numFPR - 1);
-
-   self()->getLinkage()->initARM64RealRegisterLinkage();
-   self()->setSupportsGlRegDeps();
-   self()->setSupportsGlRegDepOnFirstBlock();
-
-   self()->addSupportedLiveRegisterKind(TR_GPR);
-   self()->addSupportedLiveRegisterKind(TR_FPR);
-   self()->setLiveRegisters(new (self()->trHeapMemory()) TR_LiveRegisters(self()->comp()), TR_GPR);
-   self()->setLiveRegisters(new (self()->trHeapMemory()) TR_LiveRegisters(self()->comp()), TR_FPR);
-
-   self()->setSupportsVirtualGuardNOPing();
-
-   self()->setSupportsRecompilation();
-
-   self()->setSupportsSelect();
-
-   self()->setSupportsByteswap();
-
-   _numberBytesReadInaccessible = 0;
-   _numberBytesWriteInaccessible = 0;
-
-   if (TR::Compiler->vm.hasResumableTrapHandler(self()->comp()))
-      self()->setHasResumableTrapHandler();
-
-   if (!self()->comp()->getOption(TR_DisableRegisterPressureSimulation))
-      {
-      for (int32_t i = 0; i < TR_numSpillKinds; i++)
-         _globalRegisterBitVectors[i].init(self()->getNumberOfGlobalRegisters(), self()->trMemory());
-
-      for (TR_GlobalRegisterNumber grn=0; grn < self()->getNumberOfGlobalRegisters(); grn++)
-         {
-         TR::RealRegister::RegNum reg = (TR::RealRegister::RegNum)self()->getGlobalRegister(grn);
-         if (self()->getFirstGlobalGPR() <= grn && grn <= self()->getLastGlobalGPR())
-            _globalRegisterBitVectors[ TR_gprSpill ].set(grn);
-         else if (self()->getFirstGlobalFPR() <= grn && grn <= self()->getLastGlobalFPR())
-            _globalRegisterBitVectors[ TR_fprSpill ].set(grn);
-
-         if (!self()->getProperties().getPreserved(reg))
-            _globalRegisterBitVectors[ TR_volatileSpill ].set(grn);
-         if (self()->getProperties().getIntegerArgument(reg) || self()->getProperties().getFloatArgument(reg))
-            _globalRegisterBitVectors[ TR_linkageSpill  ].set(grn);
-         }
-      }
-
-   // Calculate inverse of getGlobalRegister function
-   //
-   TR_GlobalRegisterNumber grn;
-   int i;
-
-   TR_GlobalRegisterNumber globalRegNumbers[TR::RealRegister::NumRegisters];
-   for (i = 0; i < self()->getNumberOfGlobalGPRs(); i++)
-     {
-     grn = self()->getFirstGlobalGPR() + i;
-     globalRegNumbers[self()->getGlobalRegister(grn)] = grn;
-     }
-   for (i = 0; i < self()->getNumberOfGlobalFPRs(); i++)
-     {
-     grn = self()->getFirstGlobalFPR() + i;
-     globalRegNumbers[self()->getGlobalRegister(grn)] = grn;
-     }
-
-   // Initialize linkage reg arrays
-   TR::ARM64LinkageProperties linkageProperties = self()->getProperties();
-   for (i = 0; i < linkageProperties.getNumIntArgRegs(); i++)
-     _gprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getIntegerArgumentRegister(i)];
-   for (i = 0; i < linkageProperties.getNumFloatArgRegs(); i++)
-     _fprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getFloatArgumentRegister(i)];
-
-   if (self()->comp()->getOption(TR_TraceRA))
-      {
-      self()->setGPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstGPR, TR::RealRegister::LastGPR));
-      self()->setFPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstFPR, TR::RealRegister::LastFPR));
-      }
-
-   self()->getLinkage()->setParameterLinkageRegisterIndex(self()->comp()->getJittedMethodSymbol());
-
-   if (self()->comp()->target().isSMP())
-      self()->setEnforceStoreOrder();
-   }
-
 void
 OMR::ARM64::CodeGenerator::beginInstructionSelection()
    {

diff --git a/compiler/aarch64/codegen/OMRCodeGenerator.hpp b/compiler/aarch64/codegen/OMRCodeGenerator.hpp
@@ -156,8 +156,6 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
 
 public:
 
-   CodeGenerator();
-
    void initialize();
 
    /**

diff --git a/compiler/arm/codegen/OMRCodeGenerator.cpp b/compiler/arm/codegen/OMRCodeGenerator.cpp
@@ -244,170 +244,6 @@ OMR::ARM::CodeGenerator::initialize()
    comp->setOption(TR_DisableMaxMinOptimization);
    }
 
-
-OMR::ARM::CodeGenerator::CodeGenerator()
-   : OMR::CodeGenerator(),
-     _frameRegister(NULL),
-     _constantData(NULL),
-     _outOfLineCodeSectionList(self()->trMemory()),
-     _internalControlFlowNestingDepth(0),
-     _internalControlFlowSafeNestingDepth(0)
-   {
-   // Initialize Linkage for Code Generator
-   self()->initializeLinkage();
-
-   _unlatchedRegisterList =
-      (TR::RealRegister**)self()->trMemory()->allocateHeapMemory(sizeof(TR::RealRegister*)*(TR::RealRegister::NumRegisters + 1));
-
-   _unlatchedRegisterList[0] = 0; // mark that list is empty
-
-   _linkageProperties = &self()->getLinkage()->getProperties();
-   _linkageProperties->setEndianness(self()->comp()->target().cpu.isBigEndian());
-
-   if (!self()->comp()->getOption(TR_FullSpeedDebug))
-      self()->setSupportsDirectJNICalls();
-   self()->setSupportsVirtualGuardNOPing();
-
-   if(self()->comp()->target().isLinux())
-      {
-      // only hardhat linux-arm builds have the required gcc soft libraries
-      // that allow the vm to be compiled with -msoft-float.
-      // With -msoft-float any floating point return value is placed in gr0 for single precision and
-      // gr0 and gr1 for double precision.  This is where the jit expects the result following a directToJNI call.
-      // The floating point return value on non-hardhat linux-arm builds is through the coprocessor register f0.
-      // Therefore the HasHardFloatReturn flag must be set to force generation of instructions to move the result
-      // from f0 to gr0/gr1 following a directToJNI dispatch.
-
-      #if !defined(HARDHAT) && !defined(__VFP_FP__) // gcc does not support VFP with -mfloat-abi=hard yet
-      self()->setHasHardFloatReturn();
-      #endif
-      }
-
-   if (!debug("hasFramePointer"))
-      self()->setFrameRegister(self()->machine()->getRealRegister(_linkageProperties->getStackPointerRegister()));
-   else
-      self()->setFrameRegister(self()->machine()->getRealRegister(_linkageProperties->getFramePointerRegister()));
-
-   self()->setMethodMetaDataRegister(self()->machine()->getRealRegister(_linkageProperties->getMethodMetaDataRegister()));
-
-   // Tactical GRA settings
-#if 1 // PPC enables below, but seem no longer used?
-   self()->setGlobalGPRPartitionLimit(TR::Machine::getGlobalGPRPartitionLimit());
-   self()->setGlobalFPRPartitionLimit(TR::Machine::getGlobalFPRPartitionLimit());
-#endif
-   self()->setGlobalRegisterTable(TR::Machine::getGlobalRegisterTable());
-   _numGPR = _linkageProperties->getNumAllocatableIntegerRegisters();
-   self()->setLastGlobalGPR(TR::Machine::getLastGlobalGPRRegisterNumber());
-   self()->setLast8BitGlobalGPR(TR::Machine::getLast8BitGlobalGPRRegisterNumber());
-   self()->setLastGlobalFPR(TR::Machine::getLastGlobalFPRRegisterNumber());
-   _numFPR = _linkageProperties->getNumAllocatableFloatRegisters();
-
-   // TODO: Disable FP-GRA since current GRA does not work well with ARM linkage (where Float register usage is limited).
-   self()->setDisableFloatingPointGRA();
-
-   self()->setSupportsRecompilation();
-
-   self()->setSupportsGlRegDeps();
-   self()->setSupportsGlRegDepOnFirstBlock();
-   self()->setPerformsChecksExplicitly();
-   self()->setConsiderAllAutosAsTacticalGlobalRegisterCandidates();
-   self()->setSupportsScaledIndexAddressing();
-   self()->setSupportsAlignedAccessOnly();
-   self()->setSupportsPrimitiveArrayCopy();
-   self()->setSupportsReferenceArrayCopy();
-   self()->setSupportsLoweringConstIDiv();
-   self()->setSupportsNewInstanceImplOpt();
-
-#ifdef J9_PROJECT_SPECIFIC
-   self()->setAheadOfTimeCompile(new (self()->trHeapMemory()) TR::AheadOfTimeCompile(self()));
-#endif
-   self()->getLinkage()->initARMRealRegisterLinkage();
-   //To enable this, we must change OMR::ARM::Linkage::saveArguments to support GRA registers
-   //self()->getLinkage()->setParameterLinkageRegisterIndex(self()->comp()->getJittedMethodSymbol());
-
-   _numberBytesReadInaccessible = 0;
-   _numberBytesWriteInaccessible = 0;
-
-   self()->setSupportsJavaFloatSemantics();
-   self()->setSupportsInliningOfTypeCoersionMethods();
-
-   if (self()->comp()->target().isLinux())
-      {
-      // On AIX and Linux, we are very far away from address
-      // wrapping-around.
-      _maxObjectSizeGuaranteedNotToOverflow = 0x10000000;
-      self()->setSupportsDivCheck();
-      if (!self()->comp()->getOption(TR_DisableTraps))
-         self()->setHasResumableTrapHandler();
-      }
-   else
-      {
-      TR_ASSERT(0, "unknown target");
-      }
-
-   // Tactical GRA
-   if (!self()->comp()->getOption(TR_DisableRegisterPressureSimulation))
-      {
-      for (int32_t i = 0; i < TR_numSpillKinds; i++)
-         _globalRegisterBitVectors[i].init(self()->getNumberOfGlobalRegisters(), self()->trMemory());
-
-      for (TR_GlobalRegisterNumber grn=0; grn < self()->getNumberOfGlobalRegisters(); grn++)
-         {
-         TR::RealRegister::RegNum reg = (TR::RealRegister::RegNum)self()->getGlobalRegister(grn);
-         if (self()->getFirstGlobalGPR() <= grn && grn <= self()->getLastGlobalGPR())
-            _globalRegisterBitVectors[ TR_gprSpill ].set(grn);
-         else if (self()->getFirstGlobalFPR() <= grn && grn <= self()->getLastGlobalFPR())
-            _globalRegisterBitVectors[ TR_fprSpill ].set(grn);
-
-         if (!self()->getProperties().getPreserved(reg))
-            _globalRegisterBitVectors[ TR_volatileSpill ].set(grn);
-         if (self()->getProperties().getIntegerArgument(reg) || self()->getProperties().getFloatArgument(reg))
-            _globalRegisterBitVectors[ TR_linkageSpill  ].set(grn);
-         }
-
-      }
-
-   // Calculate inverse of getGlobalRegister function
-   //
-   TR_GlobalRegisterNumber grn;
-   int i;
-
-   TR_GlobalRegisterNumber globalRegNumbers[TR::RealRegister::NumRegisters];
-   for (i=0; i < self()->getNumberOfGlobalGPRs(); i++)
-     {
-     grn = self()->getFirstGlobalGPR() + i;
-     globalRegNumbers[self()->getGlobalRegister(grn)] = grn;
-     }
-   for (i=0; i < self()->getNumberOfGlobalFPRs(); i++)
-     {
-     grn = self()->getFirstGlobalFPR() + i;
-     globalRegNumbers[self()->getGlobalRegister(grn)] = grn;
-     }
-
-   // Initialize linkage reg arrays
-   TR::ARMLinkageProperties linkageProperties = self()->getProperties();
-   for (i=0; i < linkageProperties.getNumIntArgRegs(); i++)
-     _gprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getIntegerArgumentRegister(i)];
-   for (i=0; i < linkageProperties.getNumFloatArgRegs(); i++)
-     _fprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getFloatArgumentRegister(i)];
-
-   if (self()->comp()->getOption(TR_TraceRA))
-      {
-      self()->setGPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstGPR, TR::RealRegister::LastGPR));
-      self()->setFPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstFPR, TR::RealRegister::LastFPR));
-      }
-
-
-   if (!self()->comp()->compileRelocatableCode())
-      {
-      self()->setSupportsProfiledInlining();
-      }
-
-   // Disable optimizations for max min by default on arm
-   self()->comp()->setOption(TR_DisableMaxMinOptimization);
-   }
-
-
 #if 0 // to be enabled
 void
 OMR::ARM::CodeGenerator::armCGOnClassUnloading(void *loaderPtr)

diff --git a/compiler/arm/codegen/OMRCodeGenerator.hpp b/compiler/arm/codegen/OMRCodeGenerator.hpp
@@ -118,8 +118,6 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
 
 public:
 
-   CodeGenerator();
-
    void initialize();
 
    TR::Linkage *createLinkage(TR_LinkageConventions lc);

diff --git a/compiler/codegen/CodeGenerator.hpp b/compiler/codegen/CodeGenerator.hpp
@@ -38,10 +38,7 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGeneratorConnector
     * @param[in] comp : the TR::Compilation object
     */
    CodeGenerator(TR::Compilation *comp) :
-      OMR::CodeGeneratorConnector() {}
-
-   CodeGenerator() :
-      OMR::CodeGeneratorConnector() {}
+      OMR::CodeGeneratorConnector(comp) {}
 
    };
 }