[Core/VDP] improved accuracy of DMA to CRAM/VSRAM (verified on real h…

…ardware by Mask of Destiny) and DMA Fill timings
ekeeke · Feb 23, 2024 · 9a0a1c2 · 9a0a1c2 · ekeeke · Feb 23, 2024
1 parent 5f2f0ce
commit 9a0a1c2
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diff --git a/builds/genesis_plus_gx_libretro.dll b/builds/genesis_plus_gx_libretro.dll
diff --git a/builds/genplus_cube.dol b/builds/genplus_cube.dol
diff --git a/builds/genplus_wii.dol b/builds/genplus_wii.dol
diff --git a/core/vdp_ctrl.c b/core/vdp_ctrl.c
@@ -622,6 +622,13 @@ void vdp_dma_update(unsigned int cycles)
 
   /* Adjust for 68k bus DMA to VRAM (one word = 2 access) or DMA Copy (one read + one write = 2 access) */
   rate = rate >> (dma_type & 1);
+
+  /* Adjust for 68k bus DMA to CRAM or VSRAM when display is off (one additional access slot is lost for each refresh slot) */
+  if (dma_type == 0)
+  {
+    if (rate == 166) rate = 161;      /* 5 refresh slots per line in H32 mode when display is off */
+    else if (rate == 204) rate = 198; /* 6 refresh slots per line in H40 mode when display is off */
+  }
 
   /* Remaining DMA cycles */
   if (status & 8)
@@ -2444,6 +2451,9 @@ static void vdp_68k_data_w_m5(unsigned int data)
       dma_length = 0x10000;
     }
 
+    /* Take into account initial data word processing */
+    dma_length += 2;
+
     /* Trigger DMA */
     vdp_dma_update(m68k.cycles);
   }