-
Notifications
You must be signed in to change notification settings - Fork 11
/
imx6qdl-ts4900-2.dtsi
603 lines (541 loc) · 15.8 KB
/
imx6qdl-ts4900-2.dtsi
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
mxcfb0 = &mxcfb0;
};
memory {
reg = <0x10000000 0x40000000>;
};
leds {
compatible = "gpio-leds";
green-led {
label = "green-led";
gpios = <&gpio2 24 1>;
default-state = "on";
};
red-led {
label = "red-led";
gpios = <&gpio1 2 1>;
default-state = "off";
};
en-lcd-3p3v {
label = "en-lcd-3p3v";
gpios = <&gpio2 19 0>;
linux,default-trigger = "backlight";
default-state = "on";
};
// These are intended as userspace controlled IO. In this kernel
// version LEDs are the best interface I can find to allow both
// userspace control and a default value.
en-usb-5v {
label = "en-usb-5v";
gpios = <&gpio2 22 1>;
default-state = "off";
};
en-speaker {
label = "en-speaker";
gpios = <&gpio5 30 0>;
default-state = "on";
};
};
regulators {
compatible = "simple-bus";
reg_2p5v: 2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_1p8v: 1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_usb_otg_vbus: usb_otg_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
enable-active-high;
};
wl12xx_vmmc: wl12xx_vmmc {
compatible = "regulator-fixed";
regulator-name = "wl12xx_vmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio8 14 0>;
startup-delay-us = <100000>;
enable-active-high;
regulator-boot-on;
};
};
sound {
compatible = "fsl,imx6q-ts4900-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6q-ts4900-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <3>;
};
mxcfb0: fb@0 {
compatible = "fsl,mxc_sdc_fb";
disp_dev = "lcd";
interface_pix_fmt = "RGB24";
mode_str ="OKAYA-WVGA";
default_bpp = <16>;
int_clk = <0>;
late_init = <0>;
status = "okay";
};
lcd@0 {
compatible = "fsl,lcd";
ipu_id = <0>;
disp_id = <0>;
default_ifmt = "RGB24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_4900>;
status = "okay";
};
wlan {
compatible = "ti,wilink8";
interrupt-parent = <&gpio1>;
wlen-gpio = <&gpio8 14 0>;
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
};
backlight_lcd {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 128 140 160 180 200 220 240 255>;
default-brightness-level = <8>;
};
touchscreen_spi {
compatible = "spi-gpio";
status = "okay";
gpio-sck = <&gpio3 15 0>;
gpio-mosi = <&gpio3 14 0>;
gpio-miso = <&gpio3 13 0>;
cs-gpios = <&gpio3 12 1>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
touch: ads7843@0 {
compatible = "ti,ads7843";
reg = <0>;
interrupt-parent = <&gpio3>;
interrupts = <11 2>;
vcc-supply = <®_3p3v>;
spi-max-frequency = <100000>;
pendown-gpio = <&gpio3 11 0>;
ti,penirq-recheck-delay-usecs = /bits/ 16 <5000>;
ti,vref-mv = <3300>;
ti,swap-xy;
ti,keep-vref-on;
ti,settle-delay-usec = /bits/ 16 <5000>;
ti,vref-delay-usecs = /bits/ 16 <0>;
ti,x-plate-ohms = /bits/ 16 <400>;
ti,y-plate-ohms = /bits/ 16 <400>;
ti,pressure-max = /bits/ 16 <15000>;
ti,debounce-rep = /bits/ 16 <2>;
ti,debounce-tol = /bits/ 16 <65535>;
ti,debounce-max = /bits/ 16 <0>;
ti,pendown-gpio-debounce = <100000>;
linux,wakeup;
};
};
adc-i2c {
compatible = "i2c-gpio";
gpios = <&gpio6 31 0>, /* sda */
<&gpio2 20 0>; /* scl */
#address-cells = <1>;
#size-cells = <0>;
mcp3428@68 {
compatible = "mcp3428";
reg = <0x68>;
};
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3_1>;
status = "okay";
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
status = "okay";
flash: n25q064@0 {
compatible = "st,n25q064";
spi-max-frequency = <25000000>;
reg = <0>;
};
};
&ecspi2 {
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio5 29 0>, <&gpio5 31 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2_4900>;
status = "okay";
spidev1: spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <25000000>;
};
spidev2: spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <25000000>;
};
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_misc>;
uart1-4900 {
pinctrl_uart1_4900: uart1-grp-2 {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
>;
};
};
uart2-4900 {
pinctrl_uart2_4900: uart2-grp-2 {
fsl,pins = <
MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
>;
};
};
uart3-4900 {
pinctrl_uart3_4900: uart3-grp-2 {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
};
uart4-4900 {
pinctrl_uart4_4900: uart4-grp-2 {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
>;
};
};
uart5-4900 {
pinctrl_uart5_4900: uart5-grp-2 {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
};
// TODO verify irq uses same pad settings
usdhc1-4900 {
pinctrl_usdhc1_4900: usdhc1grp-1 {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x17059 // WIFI IRQ
>;
};
};
usdhc2-4900 {
pinctrl_usdhc2_4900: usdhc2grp-2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
};
ecspi2-4900 {
pinctrl_ecspi2_4900: ecspi2-1 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1 // Offboard CS0#
MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x100b1 // FPGA CS1#
>;
};
};
ipu-4900 {
pinctrl_ipu_4900: ipu2grp-1 {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 // DE
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 // Hsync
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 // Vsync
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
};
enet-4900 {
pinctrl_enet_4900: enet-4900 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x4001b0a8
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x80000000 // ETH_PHY_RESET
>;
};
};
misc {
pinctrl_misc: misc {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 // EN_LCD_3.3V
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 // SPI_1_CS#
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 // Audio CLK
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x80000000 // FPGA_RESET#
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x80000000 // FPGA_DONE
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 // EMMC_RESET#
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 // RED_LED#
MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x10 // FPGA 24MHZ
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 // FPGA_IRQ
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 // DIO_1
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000 // DIO_2
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 // DIO_3
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 // DIO_4
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 // DIO_5
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 // DIO_7
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x80000000 // DIO_8
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000 // DIO_9
MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x80000000 // DIO_0
MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x80000000 // DIO_6
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x80000000 // BUS_ALE#
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000 // DIO_15
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x80000000 // BUS_DIR
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000 // BUS_CS#
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 // GREEN_LED#
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000 // EN_USB_5V#
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000 // OFF_BD_RESET#
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000 // DIO_14
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 // DIO_16
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x80000000 // DIO_12
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 // DIO_18
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 // DIO_19
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x80000000 // DIO_20
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 // BUS_BHE#
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000 // DIO_13
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x80000000 // EIM_WAIT#
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000 // EN_SD_POWER#
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 // DIO_10
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x80000000 // MUX_AD_00
MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x80000000 // MUX_AD_01
MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x80000000 // MUX_AD_02
MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x80000000 // MUX_AD_03
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x80000000 // MUX_AD_04
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000 // MUX_AD_05
MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x80000000 // MUX_AD_06
MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000 // MUX_AD_07
MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000 // MUX_AD_08
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 // MUX_AD_09
MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x80000000 // MUX_AD_10
MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x80000000 // MUX_AD_11
MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x80000000 // MUX_AD_12
MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 // MUX_AD_13
MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000 // MUX_AD_14
MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000 // MUX_AD_15
>;
};
};
};
&usbotg {
vbus-supply = <®_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg_1>;
disable-over-current;
status = "okay";
};
&usbh1 {
status = "okay";
};
&weim {
status = "disabled";
};
// WIFI
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1_4900>;
vmmc-supply = <&wl12xx_vmmc>;
bus-width = <4>;
status = "okay";
non-removable;
};
// SD
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_4900>;
vmmc-supply = <®_3p3v>;
bus-width = <4>;
status = "okay";
//fsl,cd-controller;
fsl,wp-controller;
};
// eMMC
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_2>;
vmmc-supply = <®_3p3v>;
bus-width = <4>;
status = "okay";
fsl,wp-controller;
non-removable;
};
&audmux {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_2>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_4900>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_4900>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_4900>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4_4900>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5_4900>;
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
rtc: isl12022@6f {
compatible = "isl,isl12022";
reg = <0x6f>;
};
gpio8: ts4900gpio@28 {
compatible = "ts4900gpio";
reg = <0x28>;
#gpio-cells = <2>;
gpio-controller;
uart2en;
uart4en;
};
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_2>;
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 201>;
VDDA-supply = <®_3p3v>;
VDDIO-supply = <®_3p3v>;
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1_1>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2_1>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_4900>;
phy-mode = "rgmii";
phy-autoneg = "enable";
status = "okay";
};