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Fix lack of sign extend for MUL

This FINALLY fixes Vertical Force :D
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yupferris committed Feb 13, 2017
1 parent 34f11cd commit 09cb07879b9c47aea2332a50050dd91efc1b2700
Showing with 2 additions and 2 deletions.
  1. +2 −2 rustual-boy-core/src/v810.rs
@@ -396,8 +396,8 @@ impl V810 {
self.set_reg_gpr(reg2, res);
}),
OPCODE_BITS_MUL => format_i!(|reg1, reg2| {
let lhs = self.reg_gpr(reg2) as i64;
let rhs = self.reg_gpr(reg1) as i64;
let lhs = (self.reg_gpr(reg2) as i32) as i64;
let rhs = (self.reg_gpr(reg1) as i32) as i64;
let res = (lhs * rhs) as u64;
let res_low = res as u32;
let res_high = (res >> 32) as u32;

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