fix: use spin crate instead of spinning

Cargo.toml

@@ -198,7 +198,7 @@ serial_test = { version = "0.9.0", default-features = false }
 sgx = { version = "0.5.0", default-features = false }
 sha2 = { version = "0.10.2", default-features = false }
 shell-words = { version = "1.1.0", default-features = false }
-spinning = { version = "0.1.0", default-features = false }
+spin = { version = "0.9.4", default-features = false, features = ["lock_api", "spin_mutex", "rwlock", "lazy"] }
 static_assertions = { version = "1.1.0", default-features = false }
 tempfile = { version = "3.3.0", default-features = false }
 testaso = { version = "0.1.0", default-features = false }

crates/shim-kvm/Cargo.toml

@@ -26,7 +26,7 @@ paste = { workspace = true }
 primordial = { workspace = true }
 rcrt1 = { workspace = true }
 sallyport = { workspace = true }
-spinning = { workspace = true }
+spin = { workspace = true }
 x86_64 = { workspace = true, features = ["inline_asm", "instructions"] }
 xsave = { workspace = true }
 

crates/shim-kvm/src/allocator.rs

@@ -23,7 +23,7 @@ use lset::{Line, Span};
 use nbytes::bytes;
 use primordial::{Address, Page as Page4KiB};
 use sallyport::guest::Handler;
-use spinning::Lazy;
+use spin::Lazy;
 use x86_64::instructions::tlb::flush_all;
 use x86_64::structures::paging::mapper::{MapToError, UnmapError};
 use x86_64::structures::paging::{
@@ -206,8 +206,8 @@ impl EnarxAllocator {
 
         let end_of_mem = mem_start + mem_size;
 
-        *NEXT_MMAP_RWLOCK.write() =
-            (*NEXT_MMAP_RWLOCK.read() + code_size).align_up(Page::<Size4KiB>::SIZE);
+        let mut nmr = NEXT_MMAP_RWLOCK.write();
+        *nmr = (*nmr + code_size).align_up(Page::<Size4KiB>::SIZE);
 
         let allocator = Heap::empty();
 

crates/shim-kvm/src/debug.rs

@@ -181,7 +181,7 @@ unsafe fn stack_trace_from_rbp(mut rbp: usize) {
     print::_eprint(format_args!("TRACE:\n"));
 
     if SHIM_PAGETABLE.try_read().is_none() {
-        SHIM_PAGETABLE.force_unlock_write()
+        SHIM_PAGETABLE.force_write_unlock()
     }
 
     let shim_offset = SHIM_VIRT_OFFSET as usize;

crates/shim-kvm/src/exec.rs

@@ -18,7 +18,7 @@ use goblin::elf::header::ELFMAG;
 use goblin::elf::program_header::program_header64::*;
 use lset::Line;
 use nbytes::bytes;
-use spinning::{Lazy, RwLock};
+use spin::{Lazy, RwLock};
 use x86_64::structures::paging::{Page, PageTableFlags, Size4KiB};
 use x86_64::{PhysAddr, VirtAddr};
 
@@ -40,29 +40,23 @@ const EXEC_STACK_SIZE: u64 = bytes![2; MiB];
 
 /// The randomized virtual address of the exec
 #[cfg(not(feature = "gdb"))]
-pub static EXEC_VIRT_ADDR: Lazy<RwLock<VirtAddr>> = Lazy::new(|| {
-    RwLock::<VirtAddr>::const_new(
-        spinning::RawRwLock::const_new(),
-        EXEC_ELF_VIRT_ADDR_BASE + (random() & 0x7F_FFFF_F000),
-    )
-});
+pub static EXEC_VIRT_ADDR: Lazy<RwLock<VirtAddr>> =
+    Lazy::new(|| RwLock::new(EXEC_ELF_VIRT_ADDR_BASE + (random() & 0x7F_FFFF_F000)));
 
 /// The non-randomized virtual address of the exec in case the gdb feature is active
 #[cfg(feature = "gdb")]
-pub static EXEC_VIRT_ADDR: Lazy<RwLock<VirtAddr>> = Lazy::new(|| {
-    RwLock::<VirtAddr>::const_new(spinning::RawRwLock::const_new(), EXEC_ELF_VIRT_ADDR_BASE)
-});
+pub static EXEC_VIRT_ADDR: Lazy<RwLock<VirtAddr>> =
+    Lazy::new(|| RwLock::new(EXEC_ELF_VIRT_ADDR_BASE));
 
 /// Actual brk virtual address the exec gets, when calling brk
 pub static BRK_LINE: Lazy<RwLock<Line<VirtAddr>>> = Lazy::new(|| {
     let start = EXEC_BRK_VIRT_ADDR_BASE + (random() & 0xFFFF_F000);
-    RwLock::<Line<VirtAddr>>::const_new(spinning::RawRwLock::const_new(), Line::new(start, start))
+    RwLock::new(Line::new(start, start))
 });
 
 /// The global NextMMap RwLock
-pub static NEXT_MMAP_RWLOCK: Lazy<RwLock<VirtAddr>> = Lazy::new(|| {
-    RwLock::<VirtAddr>::const_new(spinning::RawRwLock::const_new(), *EXEC_VIRT_ADDR.read())
-});
+pub static NEXT_MMAP_RWLOCK: Lazy<RwLock<VirtAddr>> =
+    Lazy::new(|| RwLock::new(*EXEC_VIRT_ADDR.read()));
 
 /// load the elf binary
 fn map_elf(app_virt_start: VirtAddr) -> &'static Header {

crates/shim-kvm/src/gdt.rs

@@ -8,7 +8,7 @@ use crate::syscall::_syscall_enter;
 use core::ops::Deref;
 
 use nbytes::bytes;
-use spinning::Lazy;
+use spin::Lazy;
 use x86_64::instructions::segmentation::{Segment, Segment64, CS, DS, ES, FS, GS, SS};
 use x86_64::instructions::tables::load_tss;
 use x86_64::registers::model_specific::{KernelGsBase, LStar, SFMask, Star};

crates/shim-kvm/src/hostcall.rs

@@ -28,7 +28,7 @@ use sallyport::libc::{
 };
 use sallyport::util::ptr::is_aligned_non_null;
 use sallyport::{libc, KVM_SYSCALL_TRIGGER_PORT};
-use spinning::Lazy;
+use spin::Lazy;
 use x86_64::instructions::port::Port;
 use x86_64::instructions::segmentation::{Segment64, FS, GS};
 use x86_64::instructions::tlb::flush_all;

crates/shim-kvm/src/interrupts.rs

@@ -16,7 +16,7 @@ use core::mem::size_of;
 use core::ops::Deref;
 
 use paste::paste;
-use spinning::Lazy;
+use spin::Lazy;
 use x86_64::structures::idt::InterruptDescriptorTable;
 use x86_64::VirtAddr;
 use xsave::XSave;

crates/shim-kvm/src/paging.rs

@@ -5,8 +5,8 @@
 use crate::addr::SHIM_VIRT_OFFSET;
 use crate::snp::get_cbit_mask;
 
-use spinning::{Lazy, RwLock};
-use x86_64::registers::control::Cr3;
+use crate::pagetables::PML4T;
+use spin::{Lazy, RwLock};
 use x86_64::structures::paging::mapper::PageTableFrameMapping;
 use x86_64::structures::paging::{MappedPageTable, PageTable, PhysFrame};
 use x86_64::VirtAddr;
@@ -44,13 +44,8 @@ pub static SHIM_PAGETABLE: Lazy<RwLock<MappedPageTable<'static, EncPhysOffset>>>
         let enc_phys_offset = EncPhysOffset::default();
 
         let enc_offset_page_table = unsafe {
-            let level_4_table_ptr = enc_phys_offset.frame_to_pointer(Cr3::read().0);
-
-            MappedPageTable::new(&mut *level_4_table_ptr, enc_phys_offset)
+            MappedPageTable::new(&mut (*(PML4T.get() as *mut PageTable)), enc_phys_offset)
         };
 
-        RwLock::<MappedPageTable<'static, EncPhysOffset>>::const_new(
-            spinning::RawRwLock::const_new(),
-            enc_offset_page_table,
-        )
+        RwLock::new(enc_offset_page_table)
     });

crates/shim-kvm/src/snp/ghcb.rs

@@ -19,7 +19,7 @@ use aes_gcm::{AeadInPlace, Aes256Gcm, KeyInit, Nonce, Tag};
 use bitflags::bitflags;
 use const_default::ConstDefault;
 use sallyport::libc::{EINVAL, EIO};
-use spinning::Lazy;
+use spin::Lazy;
 use x86_64::registers::model_specific::Msr;
 use x86_64::structures::paging::{Page, Size4KiB};
 use x86_64::{PhysAddr, VirtAddr};

crates/shim-kvm/src/snp/secrets_page.rs

@@ -4,7 +4,7 @@
 
 use crate::spin::{Locked, RacyCell};
 
-use spinning::Lazy;
+use spin::Lazy;
 
 /// The SEV-SNP secrets page OS area
 ///

crates/shim-kvm/src/spin.rs

@@ -1,9 +1,9 @@
 // SPDX-License-Identifier: Apache-2.0
 
-//! wrapper around spinning types to permit trait implementations.
+//! wrapper around spin types to permit trait implementations.
 
 use core::cell::UnsafeCell;
-use spinning::{Mutex, MutexGuard, RawMutex, RawRwLock, RwLock, RwLockReadGuard, RwLockWriteGuard};
+use spin::{Mutex, MutexGuard, RwLock, RwLockReadGuard, RwLockWriteGuard};
 
 /// Cell type that should be preferred over a `static mut` is better to use in a
 /// `static`
@@ -38,7 +38,7 @@ impl<T> RacyCell<T> {
 
 unsafe impl<T: Sync> Sync for RacyCell<T> {}
 
-/// A wrapper around spinning::Mutex to permit trait implementations.
+/// A wrapper around spin::Mutex to permit trait implementations.
 pub struct Locked<A> {
     inner: Mutex<A>,
 }
@@ -48,18 +48,18 @@ impl<A> Locked<A> {
     #[inline]
     pub const fn new(inner: A) -> Self {
         Self {
-            inner: Mutex::const_new(RawMutex::const_new(), inner),
+            inner: Mutex::new(inner),
         }
     }
 
-    /// get a [`MutexGuard`](spinning::MutexGuard)
+    /// get a [`MutexGuard`](spin::MutexGuard)
     #[inline]
     pub fn lock(&self) -> MutexGuard<'_, A> {
         self.inner.lock()
     }
 }
 
-/// A wrapper around spinning::RwLock to permit trait implementations.
+/// A wrapper around spin::RwLock to permit trait implementations.
 pub struct RwLocked<A> {
     inner: RwLock<A>,
 }
@@ -69,17 +69,17 @@ impl<A> RwLocked<A> {
     #[inline]
     pub const fn new(inner: A) -> Self {
         Self {
-            inner: RwLock::const_new(RawRwLock::const_new(), inner),
+            inner: RwLock::new(inner),
         }
     }
 
-    /// get a [`RwLockReadGuard`](spinning::RwLockReadGuard)
+    /// get a [`RwLockReadGuard`](spin::RwLockReadGuard)
     #[inline]
     pub fn read(&self) -> RwLockReadGuard<'_, A> {
         self.inner.read()
     }
 
-    /// get a [`RwLockWriteGuard`](spinning::RwLockWriteGuard)
+    /// get a [`RwLockWriteGuard`](spin::RwLockWriteGuard)
     #[inline]
     pub fn write(&self) -> RwLockWriteGuard<'_, A> {
         self.inner.write()

crates/shim-kvm/src/syscall.rs

@@ -13,7 +13,7 @@ use sallyport::guest::Handler;
 use sallyport::item::enarxcall::{SYS_GETATT, SYS_GETKEY};
 #[cfg(feature = "dbg")]
 use sallyport::libc::{SYS_write, STDERR_FILENO, STDOUT_FILENO};
-use spinning::Lazy;
+use spin::Lazy;
 
 #[repr(C)]
 struct X8664DoubleReturn {

crates/shim-sgx/Cargo.toml

@@ -23,7 +23,7 @@ primordial = { workspace = true, features = ["const-default"] }
 rcrt1 = { workspace = true }
 sallyport = { workspace = true }
 sgx = { workspace = true }
-spinning = { workspace = true }
+spin = { workspace = true }
 x86_64 = { workspace = true }
 xsave = { workspace = true }
 

crates/shim-sgx/src/handler/mod.rs

@@ -60,7 +60,7 @@ use sallyport::libc::{
 use sgx::page::{Class, Flags};
 use sgx::ssa::StateSaveArea;
 use sgx::ssa::Vector;
-use spinning::{Lazy, RwLock};
+use spin::{Lazy, RwLock};
 use x86_64::addr::VirtAddr;
 use x86_64::structures::paging::Page as PageAddr;
 

crates/shim-sgx/src/thread.rs

@@ -11,7 +11,7 @@ use crate::{CSSA_0_STACK_SIZE, CSSA_1_PLUS_STACK_SIZE, NUM_SSA};
 use sallyport::guest::ThreadLocalStorage;
 use sallyport::libc::pid_t;
 use sgx::ssa::{GenPurposeRegs, StateSaveArea};
-use spinning::{Lazy, RwLock};
+use spin::{Lazy, RwLock};
 
 /// A constant array to enqueue and dequeue from.
 #[derive(Clone, Debug)]