core: use wider DFI address/bank if PHY requires it #237
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This is a part of changes related to #224.
LiteDRAM normally encodes Mode Register Set command using
DFIInjector
, passing mode register address asdfi.baddress
and value asdfi.address
. In LPDDR4 there are more Mode Registers than in other DRAMs and we need 6 bits to store the address. So when a module has only 8 banks it is not possible to issue MRS via DFIInjector this way.Initially I tried encoding both the address and the value in
dfi.address
, but then I had to modify the implementation ofsdram_write_leveling_on
/sdram_write_leveling_off
insdram.c
for LPDDR4 specifically. To avoid it, now LPDDR4 PHY sets bankbits to 6: dfd7816#diff-d84b2ae2991ef50d505ebd78f702957557f81bdfcd77f1aafbdd7bc66cc86ae5L97, and with this PRDFIInjector
would use the higher value ofgeom_settings.bankbits
andphy.bankbits
, making sure that there are enough bits for Mode Register address.