Constraint on eth_tx_clk not working in ISE14.7

[sensille]

When trying to build a design for the Spartan-6 rv901t colorlight board, I got several warning like this

ERROR:ConstraintSystem:59 - Constraint <NET "eth_tx_clk" TNM_NET =
"PRDeth_tx_clk";> [rv901t.ucf(42)]: NET "eth_tx_clk" not found. Please
verify that:

1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.

When looking into rv901t_synth.v i found that eth_tx_clk is indeed not present. I can see ethphy_eth_tx_clk_o and eth_rx_clk.
After changing the constraint to eth_rx_clk the build went through. As they are basically the same signal (assign eth_tx_clk = eth_rx_clk;) i guess it should be okay to just change the contraint.
Nonetheless the signal eth_tx_clk has a keep attribute in the source.

I run ISE 14.7 on arch linux.

[Peter-van-Tol]

Encountered the same problem with ISE on Windows 10.