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ISE: automatic "keep" attributes on constraints signals seems to cause issue in the build. #438

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enjoy-digital opened this issue Mar 25, 2020 · 2 comments

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@enjoy-digital
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The signals are probably simplified during synthesis, and missing when applying the constraint:

ERROR:ConstraintSystem:59 - Constraint <NET "eth_rx_clk" TNM_NET =
   "PRDeth_rx_clk";> [top.ucf(80)]: NET "eth_rx_clk" not found.  Please verify
   that:
   1. The specified design element actually exists in the original design.
   2. The specified object is spelled correctly in the constraint source file.

Is the keep attribute translated correctly for ISE? is it ISE that is simplifying a signal it should keep?

@enjoy-digital
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A workaround and explanation for the current issue: enjoy-digital/liteeth@fb47853.

@enjoy-digital
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Closing, not sure it's worth spending time on abandonware. We could eventually have a closer look at it if there is a specific need for a client project, but otherwise Xilinx devices previous to 7-series are not really driving the project or recommended.

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