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Publications

Lukas Sommer edited this page Oct 14, 2019 · 15 revisions

Publications describing TaPaSCo

Core TaPaSCo

[Korinth2019] Korinth, Jens, Jaco Hofmann, Carsten Heinz, and Andreas Koch. 2019. The Tapasco Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. In International Symposium on Applied Reconfigurable Computing (Arc).

TaPaSCo support for RISC-V soft-cores

[Heinz2019] Heinz, Carsten, Yannick Lavan, Jaco Hofmann, and Andreas Koch. 2019. A Catalog and in-Hardware Evaluation of Open-Source Drop-in Compatible Risc-V Softcore Processors. In IEEE Proc. International Conference on Reconfigurable Computing and Fpgas (Reconfig). IEEE.

TaPaSCo support for Amazon AWS F1 instances

[Ober2019] Ober, Micha, Jaco Hofmann, Lukas Sommer, Lukas Weber, and Andreas Koch. 2019. High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. In Fifth International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2rc).

ThreadPoolComposer, predecessor of TaPaSCo

[Korinth2015a] Korinth, Jens, David de la Chevallerie, and Andreas Koch. 2015. An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures. In The 23rd Ieee International Symposium on Field-Programmable Custom Computing Machines (Fccm).

[Korinth2015b] Korinth, Jens, David de la Chevallerie, and Andreas Koch. 2015. ThreadPoolComposer – an Open-Source Fpga Toolchain for Software Developers. In Second International Workshop on Fpgas Software Programmers (Fsp).


Publications using TaPaSCo

[Oppermann2019] Oppermann, Julian, Melanie Reuter-Oppermann, Lukas Sommer, Andreas Koch, and Oliver Sinnen. 2019. Exact and Practical Modulo Scheduling for High-Level Synthesis. TRETS 12 (2): 8:1–8:26. https://doi.org/10.1145/3317670.

[Sommer2018c] Sommer, Lukas, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, and Andreas Koch. 2018. Automatic Synthesis of Fpga-Based Accelerators for the Sum-Product Network Inference Problem. In ICML 2018 Workshop on Tractable Probabilistic Models (Tpm).

[Sommer2018b] Sommer, Lukas, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, and Andreas Koch. 2018. Automatic Mapping of the Sum-Product Network Inference Problem to Fpga-Based Accelerators. In IEEE International Conference on Computer Design (Iccd).

[Sommer2018a] Sommer, Lukas, Julian Oppermann, Jens Korinth, and Andreas Koch. 2018. Offloading Openmp Target Regions to Fpga Accelerators Using Llvm. In 2018 European Llvm Developers Meeting.

[Sommer2017b] Sommer, Lukas, Julian Oppermann, Jaco Hofmann, and Andreas Koch. 2017. Synthesis of Interleaved Multithreaded Accelerators from Openmp Loops. In 2017 International Conference on Reconfigurable Computing and Fpgas (Reconfig’17).

[Sommer2017a] Sommer, Lukas, Jens Korinth, and Andreas Koch. 2017. OpenMP Device Offloading to Fpga Accelerators. In International Conference on Application-Specific Systems, Architectures and Processors (Asap).

[Hofman2016b] Hofmann, Jaco, Jens Korinth, and Andreas Koch. 2016. A Scalable Latency-Insensitive Architecture for Fpga-Accelerated Semi-Global Matching in Stereo Vision Applications. In IEEE Proc. International Conference on Reconfigurable Computing and Fpgas (Reconfig).

[Hofman2016a] Hofmann, Jaco, Jens Korinth, and Andreas Koch. 2016. A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching. In IEEE Conference on Computer Vision and Pattern Recognition (Cvpr) Workshops.

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