Compatibility with ESP-IDF V5

esp-rs · May 1, 2022 · df907d5 · df907d5
1 parent 1edcce2
commit df907d5
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Showing 3 changed files with 56 additions and 12 deletions.
diff --git a/Cargo.toml b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "esp-idf-hal"
-version = "0.37.1"
+version = "0.37.2"
 authors = ["sapir <yasapir@gmail.com>", "Ivan Markov <ivan.markov@gmail.com>"]
 edition = "2018"
 resolver = "2"
@@ -29,7 +29,7 @@ mutex-trait = { version = "0.2", optional = true, default-features = false }
 embedded-hal = "=1.0.0-alpha.8"
 embedded-hal-0-2 = { package = "embedded-hal", version = "0.2.7", features = ["unproven"] }
 embedded-svc = { version = "0.21", optional = true, default-features = false }
-esp-idf-sys = { version = "0.31.1", optional = true, default-features = false, features = ["native"] }
+esp-idf-sys = { version = "0.31.2", optional = true, default-features = false, features = ["native"] }
 critical-section = { version = "0.2.5", optional = true, features = ["custom-impl"] }
 embassy = { version = "0", optional = true }
 # The real version is this one and it needs to be patched into the binary crate:
@@ -41,4 +41,4 @@ anyhow = "1"
 
 [dev-dependencies]
 anyhow = "1"
-esp-idf-sys = { version = "0.31.1", features = ["native", "binstart"] }
+esp-idf-sys = { version = "0.31.2", features = ["native", "binstart"] }
diff --git a/src/interrupt.rs b/src/interrupt.rs
@@ -89,7 +89,11 @@ pub mod task {
                 if let Some(yielder) = super::get_isr_yielder() {
                     yielder();
                 } else {
+                    #[cfg(esp_idf_version_major = "4")]
                     vPortEvaluateYieldFromISR(0);
+
+                    #[cfg(esp_idf_version_major = "5")]
+                    _frxt_setup_switch();
                 }
             }
         } else {

diff --git a/src/ulp.rs b/src/ulp.rs
@@ -18,13 +18,20 @@ impl Default for SleepTimer {
 }
 
 #[cfg(any(
-    all(esp32, esp_idf_esp32_ulp_coproc_enabled),
     all(
+        not(esp_idf_version_major = "4"),
+        esp_idf_ulp_coproc_enabled,
+        esp_idf_ulp_coproc_type_fsm
+    ),
+    all(esp_idf_version_major = "4", esp32, esp_idf_esp32_ulp_coproc_enabled),
+    all(
+        esp_idf_version_major = "4",
         esp32s2,
         esp_idf_esp32s2_ulp_coproc_enabled,
         not(esp_idf_esp32s2_ulp_coproc_riscv)
     ),
     all(
+        esp_idf_version_major = "4",
         esp32s3,
         esp_idf_esp32s3_ulp_coproc_enabled,
         not(esp_idf_esp32s3_ulp_coproc_riscv)
@@ -37,13 +44,20 @@ pub struct Word {
 }
 
 #[cfg(any(
-    all(esp32, esp_idf_esp32_ulp_coproc_enabled),
     all(
+        not(esp_idf_version_major = "4"),
+        esp_idf_ulp_coproc_enabled,
+        esp_idf_ulp_coproc_type_fsm
+    ),
+    all(esp_idf_version_major = "4", esp32, esp_idf_esp32_ulp_coproc_enabled),
+    all(
+        esp_idf_version_major = "4",
         esp32s2,
         esp_idf_esp32s2_ulp_coproc_enabled,
         not(esp_idf_esp32s2_ulp_coproc_riscv)
     ),
     all(
+        esp_idf_version_major = "4",
         esp32s3,
         esp_idf_esp32s3_ulp_coproc_enabled,
         not(esp_idf_esp32s3_ulp_coproc_riscv)
@@ -77,9 +91,18 @@ impl ULP {
 }
 
 #[cfg(any(
-    all(esp32, esp_idf_esp32_ulp_coproc_enabled),
-    all(esp32s2, esp_idf_esp32s2_ulp_coproc_enabled),
-    all(esp32s3, esp_idf_esp32s3_ulp_coproc_enabled)
+    all(not(esp_idf_version_major = "4"), esp_idf_ulp_coproc_enabled),
+    all(esp_idf_version_major = "4", esp32, esp_idf_esp32_ulp_coproc_enabled),
+    all(
+        esp_idf_version_major = "4",
+        esp32s2,
+        esp_idf_esp32s2_ulp_coproc_enabled
+    ),
+    all(
+        esp_idf_version_major = "4",
+        esp32s3,
+        esp_idf_esp32s3_ulp_coproc_enabled
+    )
 ))]
 impl ULP {
     const RTC_SLOW_MEM: u32 = 0x5000_0000_u32;
@@ -88,15 +111,18 @@ impl ULP {
 
     pub const MEM_START: *mut core::ffi::c_void = Self::RTC_SLOW_MEM as _;
 
-    #[cfg(esp32)]
+    #[cfg(all(esp32, esp_idf_version_major = "4"))]
     pub const MEM_SIZE: usize = esp_idf_sys::CONFIG_ESP32_ULP_COPROC_RESERVE_MEM as _;
 
-    #[cfg(esp32s2)]
+    #[cfg(all(esp32s2, esp_idf_version_major = "4"))]
     pub const MEM_SIZE: usize = esp_idf_sys::CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM as _;
 
-    #[cfg(esp32s3)]
+    #[cfg(all(esp32s3, esp_idf_version_major = "4"))]
     pub const MEM_SIZE: usize = esp_idf_sys::CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM as _;
 
+    #[cfg(not(esp_idf_version_major = "4"))]
+    pub const MEM_SIZE: usize = esp_idf_sys::CONFIG_ULP_COPROC_RESERVE_MEM as _;
+
     #[cfg(esp32)]
     const TIMER_REG: *mut u32 = esp_idf_sys::RTC_CNTL_STATE0_REG as _;
 
@@ -170,13 +196,20 @@ impl ULP {
 }
 
 #[cfg(any(
-    all(esp32, esp_idf_esp32_ulp_coproc_enabled),
     all(
+        not(esp_idf_version_major = "4"),
+        esp_idf_ulp_coproc_enabled,
+        esp_idf_ulp_coproc_type_fsm
+    ),
+    all(esp_idf_version_major = "4", esp32, esp_idf_esp32_ulp_coproc_enabled),
+    all(
+        esp_idf_version_major = "4",
         esp32s2,
         esp_idf_esp32s2_ulp_coproc_enabled,
         not(esp_idf_esp32s2_ulp_coproc_riscv)
     ),
     all(
+        esp_idf_version_major = "4",
         esp32s3,
         esp_idf_esp32s3_ulp_coproc_enabled,
         not(esp_idf_esp32s3_ulp_coproc_riscv)
@@ -266,11 +299,18 @@ impl ULP {
 
 #[cfg(any(
     all(
+        not(esp_idf_version_major = "4"),
+        esp_idf_ulp_coproc_enabled,
+        not(esp_idf_ulp_coproc_type_fsm)
+    ),
+    all(
+        esp_idf_version_major = "4",
         esp32s2,
         esp_idf_esp32s2_ulp_coproc_enabled,
         esp_idf_esp32s2_ulp_coproc_riscv
     ),
     all(
+        esp_idf_version_major = "4",
         esp32s3,
         esp_idf_esp32s3_ulp_coproc_enabled,
         esp_idf_esp32s3_ulp_coproc_riscv