Merge branch 'feature/remove_efuse_dependency' into 'master'

esp_hw_support: Removes efuse dependency

Closes IDF-4713

See merge request espressif/esp-idf!21212

components/efuse/esp32s2/esp_efuse_rtc_table.c

@@ -10,6 +10,7 @@
 #include "esp_efuse_table.h"
 #include "esp_log.h"
 #include "hal/adc_types.h"
+#include "hal/efuse_ll.h"
 #include "soc/soc_caps.h"
 
 #define RTC_TBL_LOG_TAG "efuse_rtc_table"
@@ -90,9 +91,7 @@ static const efuse_map_info_t adc_efuse_raw_map[] = {
 
 int esp_efuse_rtc_table_read_calib_version(void)
 {
-    uint32_t result = 0;
-    esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MINOR, &result, 3);
-    return result;
+    return efuse_ll_get_blk_version_minor();
 }
 
 int esp_efuse_rtc_table_get_tag(int version, int adc_num, int atten, int extra_params)

components/esp_hw_support/CMakeLists.txt

@@ -1,6 +1,7 @@
 idf_build_get_property(target IDF_TARGET)
 
 set(requires soc)
+# only esp_hw_support/adc_share_hw_ctrl.c requires efuse component
 set(priv_requires efuse spi_flash bootloader_support)
 
 set(srcs "cpu.c" "esp_memory_utils.c")

components/esp_hw_support/port/esp32/rtc_clk_init.c

@@ -14,7 +14,6 @@
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
-#include "soc/efuse_periph.h"
 #include "hal/clk_tree_ll.h"
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"

components/esp_hw_support/port/esp32c2/rtc_clk_init.c

@@ -13,7 +13,6 @@
 #include "esp32c2/rom/uart.h"
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
-#include "soc/efuse_periph.h"
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"
 #include "esp_cpu.h"

components/esp_hw_support/port/esp32c2/rtc_init.c

@@ -9,18 +9,16 @@
 #include "soc/soc.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/efuse_periph.h"
 #include "soc/gpio_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "hal/efuse_hal.h"
+#include "hal/efuse_ll.h"
 #include "regi2c_ctrl.h"
 #include "soc/regi2c_dig_reg.h"
 #include "soc/regi2c_lp_bias.h"
 #include "esp_hw_log.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
 #ifndef BOOTLOADER_BUILD
 #include "esp_private/sar_periph_ctrl.h"
 #endif
@@ -144,11 +142,7 @@ void rtc_vddsdio_set_config(rtc_vddsdio_config_t config)
 static void set_ocode_by_efuse(int ocode_scheme_ver)
 {
     assert(ocode_scheme_ver == 1);
-    // use efuse ocode.
-    signed int ocode = 0;
-    esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_OCODE, &ocode, ESP_EFUSE_OCODE[0]->bit_count);
-    assert(err == ESP_OK);
-    (void) err;
+    signed int ocode = efuse_ll_get_ocode();
 
     //recover efuse data
     ocode = ((ocode & BIT(6)) != 0)? -(ocode & 0x3f): ocode;
@@ -211,13 +205,7 @@ static void calibrate_ocode(void)
 static uint32_t get_dig_dbias_by_efuse(uint8_t dbias_scheme_ver)
 {
     assert(dbias_scheme_ver == 1);
-    uint32_t dig_dbias = 26;
-    esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_DIG_DBIAS_HVT, &dig_dbias, ESP_EFUSE_DIG_DBIAS_HVT[0]->bit_count);
-    if (err != ESP_OK) {
-        dig_dbias = 26;
-        ESP_HW_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
-    }
-    return dig_dbias;
+    return efuse_ll_get_dig_dbias_hvt();
 }
 
 uint32_t get_rtc_dbias_by_efuse(uint8_t dbias_scheme_ver, uint32_t dig_dbias)
@@ -226,20 +214,14 @@ uint32_t get_rtc_dbias_by_efuse(uint8_t dbias_scheme_ver, uint32_t dig_dbias)
     uint32_t rtc_dbias = 31;
 
     //read efuse data
-    signed int dig_slp_dbias2 = 0, dig_slp_dbias26 = 0, dig_act_dbias26 = 0, dig_act_step = 0, rtc_slp_dbias29 = 0, rtc_slp_dbias31 = 0, rtc_act_dbias31 = 0, rtc_act_dbias13 = 0;
-    esp_err_t err0 = esp_efuse_read_field_blob(ESP_EFUSE_DIG_LDO_SLP_DBIAS2, &dig_slp_dbias2, ESP_EFUSE_DIG_LDO_SLP_DBIAS2[0]->bit_count);
-    esp_err_t err1 = esp_efuse_read_field_blob(ESP_EFUSE_DIG_LDO_SLP_DBIAS26, &dig_slp_dbias26, ESP_EFUSE_DIG_LDO_SLP_DBIAS26[0]->bit_count);
-    esp_err_t err2 = esp_efuse_read_field_blob(ESP_EFUSE_DIG_LDO_ACT_DBIAS26, &dig_act_dbias26, ESP_EFUSE_DIG_LDO_ACT_DBIAS26[0]->bit_count);
-    esp_err_t err3 = esp_efuse_read_field_blob(ESP_EFUSE_DIG_LDO_ACT_STEPD10, &dig_act_step, ESP_EFUSE_DIG_LDO_ACT_STEPD10[0]->bit_count);
-    esp_err_t err4 = esp_efuse_read_field_blob(ESP_EFUSE_RTC_LDO_SLP_DBIAS29, &rtc_slp_dbias29, ESP_EFUSE_RTC_LDO_SLP_DBIAS29[0]->bit_count);
-    esp_err_t err5 = esp_efuse_read_field_blob(ESP_EFUSE_RTC_LDO_SLP_DBIAS31, &rtc_slp_dbias31, ESP_EFUSE_RTC_LDO_SLP_DBIAS31[0]->bit_count);
-    esp_err_t err6 = esp_efuse_read_field_blob(ESP_EFUSE_RTC_LDO_ACT_DBIAS31, &rtc_act_dbias31, ESP_EFUSE_RTC_LDO_ACT_DBIAS31[0]->bit_count);
-    esp_err_t err7 = esp_efuse_read_field_blob(ESP_EFUSE_RTC_LDO_ACT_DBIAS13, &rtc_act_dbias13, ESP_EFUSE_RTC_LDO_ACT_DBIAS13[0]->bit_count);
-
-    if ((err0 != ESP_OK) | (err1 != ESP_OK) | (err2 != ESP_OK) | (err3 != ESP_OK) | (err4 != ESP_OK) | (err5 != ESP_OK) | (err6 != ESP_OK) | (err7 != ESP_OK)) {
-        ESP_HW_LOGW(TAG, "efuse read fail, set default rtc_dbias value: %d\n", rtc_dbias);
-        return rtc_dbias;
-    }
+    signed int dig_slp_dbias2 = efuse_ll_get_dig_ldo_slp_dbias2();
+    signed int dig_slp_dbias26 = efuse_ll_get_dig_ldo_slp_dbias26();
+    signed int dig_act_dbias26 = efuse_ll_get_dig_ldo_act_dbias26();
+    signed int dig_act_step = efuse_ll_get_dig_ldo_act_stepd10();
+    signed int rtc_slp_dbias29 = efuse_ll_get_rtc_ldo_slp_dbias29();
+    signed int rtc_slp_dbias31 = efuse_ll_get_rtc_ldo_slp_dbias31();
+    signed int rtc_act_dbias31 = efuse_ll_get_rtc_ldo_act_dbias31();
+    signed int rtc_act_dbias13 = efuse_ll_get_rtc_ldo_act_dbias13();
 
     //recover dig&rtc parameter
     dig_slp_dbias2 = ((dig_slp_dbias2 & BIT(6)) != 0)? -(dig_slp_dbias2 & 0x3f): dig_slp_dbias2;

components/esp_hw_support/port/esp32c2/rtc_sleep.c

@@ -20,7 +20,6 @@
 #include "regi2c_ctrl.h"
 #include "soc/regi2c_lp_bias.h"
 #include "soc/regi2c_dig_reg.h"
-#include "esp_efuse.h"
 
 /**
  * Configure whether certain peripherals are powered down in deep sleep

components/esp_hw_support/port/esp32c3/rtc_clk_init.c

@@ -13,7 +13,6 @@
 #include "esp32c3/rom/uart.h"
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
-#include "soc/efuse_periph.h"
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"
 #include "esp_cpu.h"

components/esp_hw_support/port/esp32c3/rtc_init.c

@@ -9,18 +9,16 @@
 #include "soc/soc.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/efuse_periph.h"
 #include "soc/gpio_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "hal/efuse_hal.h"
+#include "hal/efuse_ll.h"
 #include "regi2c_ctrl.h"
 #include "soc/regi2c_dig_reg.h"
 #include "soc/regi2c_lp_bias.h"
 #include "esp_hw_log.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
 #ifndef BOOTLOADER_BUILD
 #include "esp_private/sar_periph_ctrl.h"
 #endif
@@ -55,12 +53,7 @@ void rtc_init(rtc_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_TIMER6_REG, RTC_CNTL_DG_PERI_WAIT_TIMER, rtc_init_cfg.dg_peri_wait_cycles);
 
     if (cfg.cali_ocode) {
-        uint32_t rtc_calib_version = 0;
-        esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MAJOR, &rtc_calib_version, ESP_EFUSE_BLK_VERSION_MAJOR[0]->bit_count); // IDF-5366
-        if (err != ESP_OK) {
-            rtc_calib_version = 0;
-            ESP_HW_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
-        }
+        uint32_t rtc_calib_version = efuse_ll_get_blk_version_major(); // IDF-5366
         if (rtc_calib_version == 1) {
             set_ocode_by_efuse(rtc_calib_version);
         } else {
@@ -207,11 +200,7 @@ void rtc_vddsdio_set_config(rtc_vddsdio_config_t config)
 static void set_ocode_by_efuse(int calib_version)
 {
     assert(calib_version == 1);
-    // use efuse ocode.
-    uint32_t ocode;
-    esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_OCODE, &ocode, 8);
-    assert(err == ESP_OK);
-    (void) err;
+    uint32_t ocode = efuse_ll_get_ocode();
     REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_EXT_CODE, ocode);
     REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_CODE, 1);
 }
@@ -268,32 +257,17 @@ static void calibrate_ocode(void)
 static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
 {
     assert(chip_version >= 3);
-    uint32_t dig_dbias = 28;
-    esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_DIG_DBIAS_HVT, &dig_dbias, 5);
-    if (err != ESP_OK) {
-        dig_dbias = 28;
-        ESP_HW_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
-    }
-    return dig_dbias;
+    return efuse_ll_get_dig_dbias_hvt();
 }
 
 uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
 {
     assert(chip_version >= 3);
     uint32_t rtc_dbias = 0;
-    signed int k_rtc_ldo = 0, k_dig_ldo = 0, v_rtc_bias20 = 0, v_dig_bias20 = 0;
-    esp_err_t err0 = esp_efuse_read_field_blob(ESP_EFUSE_K_RTC_LDO, &k_rtc_ldo, 7);
-    esp_err_t err1 = esp_efuse_read_field_blob(ESP_EFUSE_K_DIG_LDO, &k_dig_ldo, 7);
-    esp_err_t err2 = esp_efuse_read_field_blob(ESP_EFUSE_V_RTC_DBIAS20, &v_rtc_bias20, 8);
-    esp_err_t err3 = esp_efuse_read_field_blob(ESP_EFUSE_V_DIG_DBIAS20, &v_dig_bias20, 8);
-    if ((err0 != ESP_OK) | (err1 != ESP_OK) | (err2 != ESP_OK) | (err3 != ESP_OK)) {
-        k_rtc_ldo = 0;
-        k_dig_ldo = 0;
-        v_rtc_bias20 = 0;
-        v_dig_bias20 = 0;
-        ESP_HW_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
-    }
-
+    signed int k_rtc_ldo = efuse_ll_get_k_rtc_ldo();
+    signed int k_dig_ldo = efuse_ll_get_k_dig_ldo();
+    signed int v_rtc_bias20 = efuse_ll_get_v_rtc_dbias20();
+    signed int v_dig_bias20 = efuse_ll_get_v_dig_dbias20();
     k_rtc_ldo =  ((k_rtc_ldo & BIT(6)) != 0)? -(k_rtc_ldo & 0x3f): k_rtc_ldo;
     k_dig_ldo =  ((k_dig_ldo & BIT(6)) != 0)? -(k_dig_ldo & 0x3f): (uint8_t)k_dig_ldo;
     v_rtc_bias20 =  ((v_rtc_bias20 & BIT(7)) != 0)? -(v_rtc_bias20 & 0x7f): (uint8_t)v_rtc_bias20;

components/esp_hw_support/port/esp32c6/rtc_clk_init.c

@@ -12,7 +12,6 @@
 #include "esp32c6/rom/rtc.h"
 #include "esp32c6/rom/uart.h"
 #include "soc/rtc.h"
-#include "soc/efuse_periph.h"
 #include "esp_cpu.h"
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"

components/esp_hw_support/port/esp32h4/rtc_clk_init.c

@@ -16,7 +16,6 @@
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/efuse_periph.h"
 #include "esp_hw_log.h"
 #include "esp_cpu.h"
 #include "sdkconfig.h"

components/esp_hw_support/port/esp32h4/rtc_init.c

@@ -9,15 +9,12 @@
 #include "soc/soc.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/efuse_periph.h"
 #include "soc/gpio_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "soc/syscon_reg.h"
 #include "regi2c_ctrl.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
 #include "i2c_pmu.h"
 #include "soc/clkrst_reg.h"
 #ifndef BOOTLOADER_BUILD

components/esp_hw_support/port/esp32h4/rtc_sleep.c

@@ -21,7 +21,6 @@
 #include "regi2c_ctrl.h"
 #include "soc/regi2c_bias.h"
 #include "soc/regi2c_ulp.h"
-#include "esp_efuse.h"
 #include "i2c_pmu.h"
 #include "esp_hw_log.h"
 #include "esp_rom_uart.h"

components/esp_hw_support/port/esp32s2/rtc_clk_init.c

@@ -13,7 +13,6 @@
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
-#include "soc/efuse_periph.h"
 #include "soc/syscon_reg.h"
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"

components/esp_hw_support/port/esp32s2/rtc_init.c

@@ -9,15 +9,14 @@
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/dport_reg.h"
-#include "soc/efuse_periph.h"
 #include "soc/gpio_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/extmem_reg.h"
 #include "soc/regi2c_ulp.h"
+#include "hal/efuse_hal.h"
+#include "hal/efuse_ll.h"
 #include "regi2c_ctrl.h"
 #include "esp_hw_log.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
 #ifndef BOOTLOADER_BUILD
 #include "esp_private/sar_periph_ctrl.h"
 #endif
@@ -154,8 +153,7 @@ void rtc_init(rtc_config_t cfg)
 
 #if !CONFIG_IDF_ENV_FPGA
     if (cfg.cali_ocode) {
-        uint32_t rtc_calib_version = 0;
-        esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MINOR, &rtc_calib_version, ESP_EFUSE_BLK_VERSION_MINOR[0]->bit_count); // IDF-5366
+        uint32_t rtc_calib_version = efuse_ll_get_blk_version_minor(); // IDF-5366
         if (rtc_calib_version == 2) {
             set_ocode_by_efuse(rtc_calib_version);
         } else {
@@ -222,13 +220,7 @@ void rtc_vddsdio_set_config(rtc_vddsdio_config_t config)
 static void set_ocode_by_efuse(int calib_version)
 {
     assert(calib_version == 2);
-    // use efuse ocode.
-    uint32_t ocode1 = 0;
-    uint32_t ocode2 = 0;
-    uint32_t ocode;
-    esp_efuse_read_block(2, &ocode1, 16*8, 4);
-    esp_efuse_read_block(2, &ocode2, 18*8, 3);
-    ocode = (ocode2 << 4) + ocode1;
+    uint32_t ocode = efuse_ll_get_ocode();
     if (ocode >> 6) {
         ocode = 93 - (ocode ^ (1 << 6));
     } else {