Merge branch 'bugfix/s3_irom_addr_v5.1' into 'release/v5.1'

soc: fix SOC_IROM_MASK_HIGH for esp32s3 (v5.1) See merge request espressif/esp-idf!27136
espressif · Dec 20, 2023 · 40bea11 · 40bea11
2 parents b88e73f + c43b66c
commit 40bea11
Show file tree

Hide file tree

Showing 4 changed files with 7 additions and 7 deletions.
diff --git a/components/soc/esp32/include/soc/soc.h b/components/soc/esp32/include/soc/soc.h
@@ -176,7 +176,7 @@
 #define SOC_IROM_LOW            0x400D0000
 #define SOC_IROM_HIGH           0x40400000
 #define SOC_IROM_MASK_LOW       0x40000000
-#define SOC_IROM_MASK_HIGH      0x40064F00
+#define SOC_IROM_MASK_HIGH      0x40070000
 #define SOC_CACHE_PRO_LOW       0x40070000
 #define SOC_CACHE_PRO_HIGH      0x40078000
 #define SOC_CACHE_APP_LOW       0x40078000

diff --git a/components/soc/esp32c6/include/soc/soc.h b/components/soc/esp32c6/include/soc/soc.h
@@ -159,8 +159,8 @@
 #define SOC_DROM_LOW    SOC_IROM_LOW
 #define SOC_DROM_HIGH   SOC_IROM_HIGH
 #define SOC_IROM_MASK_LOW  0x40000000
-#define SOC_IROM_MASK_HIGH 0x4004AC00
-#define SOC_DROM_MASK_LOW  0x4004AC00
+#define SOC_IROM_MASK_HIGH 0x40050000
+#define SOC_DROM_MASK_LOW  0x40000000
 #define SOC_DROM_MASK_HIGH 0x40050000
 #define SOC_IRAM_LOW    0x40800000
 #define SOC_IRAM_HIGH   0x40880000

diff --git a/components/soc/esp32h2/include/soc/soc.h b/components/soc/esp32h2/include/soc/soc.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -157,8 +157,8 @@
 #define SOC_DROM_LOW    SOC_IROM_LOW
 #define SOC_DROM_HIGH   SOC_IROM_HIGH
 #define SOC_IROM_MASK_LOW  0x40000000
-#define SOC_IROM_MASK_HIGH 0x4001C400
-#define SOC_DROM_MASK_LOW  0x4001C400
+#define SOC_IROM_MASK_HIGH 0x40020000
+#define SOC_DROM_MASK_LOW  0x40000000
 #define SOC_DROM_MASK_HIGH 0x40020000
 #define SOC_IRAM_LOW    0x40800000
 #define SOC_IRAM_HIGH   0x40850000

diff --git a/components/soc/esp32s3/include/soc/soc.h b/components/soc/esp32s3/include/soc/soc.h
@@ -187,7 +187,7 @@
 #define SOC_EXTRAM_DATA_LOW 0x3C000000
 #define SOC_EXTRAM_DATA_HIGH 0x3E000000
 #define SOC_IROM_MASK_LOW  0x40000000
-#define SOC_IROM_MASK_HIGH 0x4001A100
+#define SOC_IROM_MASK_HIGH 0x40060000
 
 #define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW)
 #define SOC_MAX_CONTIGUOUS_RAM_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) ///< Largest span of contiguous memory (DRAM or IRAM) in the address space