Merge branch 'feature/do_not_disable_cache_when_xip_from_psram_v4.4' …

…into 'release/v4.4'

system: do not disable cache when xip from psram (v4.4)

See merge request espressif/esp-idf!21651

.gitlab/ci/target-test.yml

@@ -395,6 +395,18 @@ test_app_test_flash_psram_f8r8:
     - ESP32S3
     - MSPI_F8R8
 
+test_app_test_xip_psram_esp32s2:
+  extends: .test_app_esp32s2_template
+  tags:
+    - ESP32S2
+    - Example_GENERIC
+
+test_app_test_xip_psram_esp32s3:
+  extends: .test_app_esp32s3_template
+  tags:
+    - ESP32S3
+    - MSPI_F4R8
+
 .component_ut_template:
   extends: .target_test_job_template
   needs: # the assign already needs all the build jobs
@@ -747,7 +759,7 @@ UT_C3_SDSPI:
 
 UT_S3:
   extends: .unit_test_esp32s3_template
-  parallel: 32
+  parallel: 33
   tags:
     - ESP32S3_IDF
     - UT_T1_1

components/spi_flash/cache_utils.c

@@ -762,11 +762,11 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable
     uint32_t instruction_use_spiram = 0;
     uint32_t rodata_use_spiram = 0;
 #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
-    extern uint32_t esp_spiram_instruction_access_enabled();
+    extern uint32_t esp_spiram_instruction_access_enabled(void);
     instruction_use_spiram = esp_spiram_instruction_access_enabled();
 #endif
 #if CONFIG_SPIRAM_RODATA
-    extern uint32_t esp_spiram_rodata_access_enabled();
+    extern uint32_t esp_spiram_rodata_access_enabled(void);
     rodata_use_spiram = esp_spiram_rodata_access_enabled();
 #endif
 

components/spi_flash/spi_flash_os_func_app.c

@@ -21,6 +21,7 @@
 
 #include "driver/spi_common_internal.h"
 
+#define SPI_FLASH_CACHE_NO_DISABLE  (CONFIG_SPI_FLASH_AUTO_SUSPEND || (CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA))
 static const char TAG[] = "spi_flash";
 
 /*
@@ -59,14 +60,14 @@ static inline IRAM_ATTR bool on_spi1_check_yield(spi1_app_func_arg_t* ctx);
 
 IRAM_ATTR static void cache_enable(void* arg)
 {
-#ifndef CONFIG_SPI_FLASH_AUTO_SUSPEND
+#if !SPI_FLASH_CACHE_NO_DISABLE
     g_flash_guard_default_ops.end();
 #endif
 }
 
 IRAM_ATTR static void cache_disable(void* arg)
 {
-#ifndef CONFIG_SPI_FLASH_AUTO_SUSPEND
+#if !SPI_FLASH_CACHE_NO_DISABLE
     g_flash_guard_default_ops.start();
 #endif
 }

tools/test_apps/system/xip_from_psram/CMakeLists.txt

@@ -0,0 +1,4 @@
+cmake_minimum_required(VERSION 3.5)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(xip_psram_test)

tools/test_apps/system/xip_from_psram/README.md

@@ -0,0 +1,4 @@
+| Supported Targets | ESP32-S2 | ESP32-S3 |
+| ----------------- | -------- | -------- |
+
+This test app is used to test PSRAM

tools/test_apps/system/xip_from_psram/app_test.py

@@ -0,0 +1,42 @@
+# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+# SPDX-License-Identifier: Apache-2.0
+
+
+import glob
+import os
+from typing import Any
+
+import ttfw_idf
+from tiny_test_fw import Utility
+
+
+def test_loop(env, config_names):  # type: (Any, Any) -> None
+
+    for name in config_names:
+        Utility.console_log("Checking config \"{}\"... ".format(name), end='')
+        dut = env.get_dut('xip_from_psram', 'tools/test_apps/system/xip_from_psram', app_config_name=name)
+        dut.start_app()
+        dut.expect('Finish')
+        env.close_dut(dut.name)
+        Utility.console_log('done')
+
+
+@ttfw_idf.idf_custom_test(env_tag='Example_GENERIC', target=['esp32s2'])
+def test_xip_psram_esp32s2(env, _):  # type: (Any, Any) -> None
+
+    config_files = glob.glob(os.path.join(os.path.dirname(__file__), 'sdkconfig.ci.esp32s2'))
+    config_names = [os.path.basename(s).replace('sdkconfig.ci.', '') for s in config_files]
+    test_loop(env, config_names)
+
+
+@ttfw_idf.idf_custom_test(env_tag='MSPI_F4R8', target=['esp32s3'])
+def test_xip_psram_esp32s3(env, _):  # type: (Any, Any) -> None
+
+    config_files = glob.glob(os.path.join(os.path.dirname(__file__), 'sdkconfig.ci.esp32s3'))
+    config_names = [os.path.basename(s).replace('sdkconfig.ci.', '') for s in config_files]
+    test_loop(env, config_names)
+
+
+if __name__ == '__main__':
+    test_xip_psram_esp32s2()
+    test_xip_psram_esp32s3()

tools/test_apps/system/xip_from_psram/main/CMakeLists.txt

@@ -0,0 +1,5 @@
+idf_build_get_property(target IDF_TARGET)
+
+set(srcs "test_xip_psram.c")
+
+idf_component_register(SRCS ${srcs})

tools/test_apps/system/xip_from_psram/main/test_xip_psram.c

@@ -0,0 +1,94 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <sys/param.h>
+#include <string.h>
+#include <inttypes.h>
+#include "sdkconfig.h"
+#include "esp_log.h"
+#include "esp_attr.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "unity.h"
+#include "esp_heap_caps.h"
+#include "esp_flash.h"
+#include "esp_partition.h"
+
+__attribute__((unused)) const static char *TAG = "PSRAM";
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA
+#include "esp_partition.h"
+#include "esp_timer.h"
+#include "esp32s3/rom/spi_flash.h"
+
+#define SECTOR_LEN              4096
+#define TEST_NUM                10
+#define TEST_BUF                {0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9}
+
+static uint32_t s_timer_cb_exe_times;
+static const uint8_t s_test_buf[TEST_NUM] = TEST_BUF;
+
+static const esp_partition_t *s_get_partition(void)
+{
+    //Find the "storage1" partition defined in `partitions.csv`
+    const esp_partition_t *result = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, "storage1");
+    if (!result) {
+        ESP_LOGE(TAG, "Can't find the partition, please define it correctly in `partitions.csv`");
+        abort();
+    }
+    return result;
+}
+
+static void NOINLINE_ATTR s_test_rodata(void* arg)
+{
+    s_timer_cb_exe_times ++;
+    uint8_t cmp_buf[TEST_NUM] = TEST_BUF;
+    TEST_ASSERT(memcmp(cmp_buf, s_test_buf, TEST_NUM) == 0);
+}
+
+void test_spi1_flash_with_xip_psram(void)
+{
+    //Get the partition used for SPI1 erase operation
+    const esp_partition_t *part = s_get_partition();
+    ESP_LOGI(TAG, "found partition '%s' at offset 0x%"PRIx32" with size 0x%"PRIx32, part->label, part->address, part->size);
+    //Erase whole region
+    TEST_ESP_OK(esp_flash_erase_region(part->flash_chip, part->address, part->size));
+
+
+    esp_timer_handle_t oneshot_timer;
+    const esp_timer_create_args_t oneshot_timer_args = {
+        .callback = &s_test_rodata,
+        .arg = NULL,
+        .dispatch_method = ESP_TIMER_ISR,
+        .name = "one-shot"
+    };
+    ESP_ERROR_CHECK(esp_timer_create(&oneshot_timer_args, &oneshot_timer));
+
+    esp_rom_spiflash_result_t ret;
+    uint32_t start = part->address;
+    ESP_LOGI(TAG, "test data partition: 0x%"PRIx32, start);
+    uint32_t sector_num = start / SECTOR_LEN;
+
+    ESP_ERROR_CHECK(esp_timer_start_periodic(oneshot_timer, 1 * 10 * 1000));
+    ret = esp_rom_spiflash_erase_sector(sector_num);
+    if (ret != ESP_ROM_SPIFLASH_RESULT_OK) {
+        ESP_LOGE(TAG, "erase fail!");
+        TEST_ASSERT(false);
+    }
+
+    TEST_ASSERT(s_timer_cb_exe_times > 0);
+    printf("timer callback runs %"PRId32" times\n", s_timer_cb_exe_times);
+
+    ESP_LOGI(TAG, "Finish");
+    ESP_ERROR_CHECK(esp_timer_stop(oneshot_timer));
+    ESP_ERROR_CHECK(esp_timer_delete(oneshot_timer));
+}
+
+void app_main(void)
+{
+	test_spi1_flash_with_xip_psram();
+}
+#endif  //CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA

tools/test_apps/system/xip_from_psram/partitions.csv

@@ -0,0 +1,6 @@
+# Name,   Type, SubType, Offset,  Size, Flags
+# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
+nvs,        data, nvs,      0x9000,  0x6000,
+phy_init,   data, phy,      0xf000,  0x1000,
+factory,    app,  factory,  0x10000, 1M,
+storage1,   data, fat,             , 512K,

tools/test_apps/system/xip_from_psram/sdkconfig.ci.esp32s2

@@ -0,0 +1,5 @@
+CONFIG_IDF_TARGET="esp32s2"
+
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
+CONFIG_SPIRAM_RODATA=y

tools/test_apps/system/xip_from_psram/sdkconfig.ci.esp32s3

@@ -0,0 +1,6 @@
+CONFIG_IDF_TARGET="esp32s3"
+
+CONFIG_ESP32S3_SPIRAM_SUPPORT=y
+CONFIG_SPIRAM_MODE_OCT=y
+CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
+CONFIG_SPIRAM_RODATA=y

tools/test_apps/system/xip_from_psram/sdkconfig.defaults

@@ -0,0 +1,5 @@
+CONFIG_PARTITION_TABLE_CUSTOM=y
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
+CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
+
+CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD=y

tools/unit-test-app/configs/spi_flash_config_s3

@@ -0,0 +1,5 @@
+TEST_COMPONENTS=spi_flash
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
+CONFIG_SPIRAM_RODATA=y
+CONFIG_IDF_TARGET="esp32s3"