Skip to content

Commit

Permalink
Merge branch 'bugfix/aud-5252_v5.1' into 'release/v5.1'
Browse files Browse the repository at this point in the history 
backport v5.1: fix the issue of modem hang caused by incorrect configuration of power and isolate signals

See merge request espressif/esp-idf!30008
  • Loading branch information
@jack0c
jack0c committed Apr 3, 2024
2 parents 54ad993 + 4254953 commit a1471a9
Show file tree
Hide file tree
Showing 8 changed files with 12 additions and 8 deletions.
1 change: 1 addition & 0 deletions components/esp_hw_support/port/esp32/rtc_init.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@ void rtc_init(rtc_config_t cfg)
* No worry about the power consumption, Because modem Force PD will be set at the end of this function.
*/
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);

CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU | RTC_CNTL_TXRF_I2C_PU |
RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU);
Expand Down
2 changes: 1 addition & 1 deletion components/esp_hw_support/port/esp32/rtc_sleep.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -183,7 +183,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
}

if (cfg.modem_pd_en) {
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO | RTC_CNTL_WIFI_FORCE_ISO);
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO);
REG_CLR_BIT(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PU);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN);
} else {
Expand Down
3 changes: 2 additions & 1 deletion components/esp_hw_support/port/esp32c3/rtc_init.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@ void rtc_init(rtc_config_t cfg)
* No worry about the power consumption, Because modem Force PD will be set at the end of this function.
*/
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);

REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0);
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0);
Expand Down Expand Up @@ -263,7 +264,7 @@ uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
static void set_rtc_dig_dbias()
{
/*
1. a reasonable dig_dbias which by scaning pvt to make 160 CPU run successful stored in efuse;
1. a reasonable dig_dbias which by scanning pvt to make 160 CPU run successful stored in efuse;
2. also we store some value in efuse, include:
k_rtc_ldo (slope of rtc voltage & rtc_dbias);
k_dig_ldo (slope of digital voltage & digital_dbias);
Expand Down
4 changes: 2 additions & 2 deletions components/esp_hw_support/port/esp32c3/rtc_sleep.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -174,14 +174,14 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
rtc_sleep_pu(pu_cfg);
}
if (cfg.wifi_pd_en) {
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO | RTC_CNTL_WIFI_FORCE_ISO);
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO);
REG_CLR_BIT(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PU);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN);
} else {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN);
}
if (cfg.bt_pd_en) {
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_NOISO | RTC_CNTL_BT_FORCE_ISO);
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_NOISO);
REG_CLR_BIT(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PU);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_PD_EN);
} else {
Expand Down
3 changes: 2 additions & 1 deletion components/esp_hw_support/port/esp32s2/rtc_init.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ void rtc_init(rtc_config_t cfg)
* No worry about the power consumption, Because modem Force PD will be set at the end of this function.
*/
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);

CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
Expand All @@ -46,7 +47,7 @@ void rtc_init(rtc_config_t cfg)
// set shortest possible sleep time limit
REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTL_MIN_SLP_VAL, RTC_CNTL_MIN_SLP_VAL_MIN);

/* This power domian removed
/* This power domain removed
* set rom&ram timer
* REG_SET_FIELD(RTC_CNTL_TIMER3_REG, RTC_CNTL_ROM_RAM_POWERUP_TIMER, ROM_RAM_POWERUP_CYCLES);
* REG_SET_FIELD(RTC_CNTL_TIMER3_REG, RTC_CNTL_ROM_RAM_WAIT_TIMER, ROM_RAM_WAIT_CYCLES);
Expand Down
2 changes: 1 addition & 1 deletion components/esp_hw_support/port/esp32s2/rtc_sleep.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -200,7 +200,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
}

if (cfg.wifi_pd_en) {
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO | RTC_CNTL_WIFI_FORCE_ISO);
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO);
REG_CLR_BIT(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PU);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN);
} else {
Expand Down
3 changes: 2 additions & 1 deletion components/esp_hw_support/port/esp32s3/rtc_init.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@ void rtc_init(rtc_config_t cfg)
* No worry about the power consumption, Because modem Force PD will be set at the end of this function.
*/
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);

REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0);
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0);
Expand Down Expand Up @@ -382,7 +383,7 @@ static uint32_t get_dig1v3_dbias_by_efuse(uint8_t pvt_scheme_ver)
static void rtc_set_stored_dbias(void)
{
/*
1. a reasonable dig_dbias which by scaning pvt to make 240 CPU run successful stored in efuse;
1. a reasonable dig_dbias which by scanning pvt to make 240 CPU run successful stored in efuse;
2. also we store some value in efuse, include:
k_rtc_ldo (slope of rtc voltage & rtc_dbias);
k_dig_ldo (slope of digital voltage & digital_dbias);
Expand Down
2 changes: 1 addition & 1 deletion components/esp_hw_support/port/esp32s3/rtc_sleep.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -178,7 +178,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
}

if (cfg.modem_pd_en) {
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO | RTC_CNTL_WIFI_FORCE_ISO);
REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO);
REG_CLR_BIT(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PU);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN);
} else {
Expand Down

0 comments on commit a1471a9

Please sign in to comment.