Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Merge branch 'feature/esp_cache_msync' into 'master'
esp_mm: esp_cache_msync, a cache synchronise API Closes IDF-6587, IDF-6779, and IDF-6288 See merge request espressif/esp-idf!22380
- Loading branch information
Showing
43 changed files
with
857 additions
and
73 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,36 @@ | ||
| /* | ||
| * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
|
||
| #include <sys/param.h> | ||
| #include <inttypes.h> | ||
| #include "sdkconfig.h" | ||
| #include "rom/cache.h" | ||
| #include "esp_private/esp_cache_esp32_private.h" | ||
|
|
||
|
|
||
| static cache_driver_t s_cache_drv = { | ||
| Cache_Flush, | ||
| NULL, | ||
| }; | ||
|
|
||
|
|
||
| void cache_register_writeback(cache_driver_t *func) | ||
| { | ||
| s_cache_drv.cache_writeback_psram = func->cache_writeback_psram; | ||
| } | ||
|
|
||
|
|
||
| void cache_sync(void) | ||
| { | ||
| if (s_cache_drv.cache_writeback_psram) { | ||
| s_cache_drv.cache_writeback_psram(); | ||
| } | ||
|
|
||
| s_cache_drv.cache_flush(0); | ||
| #if !CONFIG_FREERTOS_UNICORE | ||
| s_cache_drv.cache_flush(1); | ||
| #endif // !CONFIG_FREERTOS_UNICORE | ||
| } |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,81 @@ | ||
| /* | ||
| * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
|
||
| #include <sys/param.h> | ||
| #include <inttypes.h> | ||
| #include "sdkconfig.h" | ||
| #include "esp_check.h" | ||
| #include "esp_log.h" | ||
| #include "soc/soc_caps.h" | ||
| #include "hal/mmu_hal.h" | ||
| #include "hal/cache_hal.h" | ||
| #include "esp_cache.h" | ||
| #include "esp_private/critical_section.h" | ||
|
|
||
|
|
||
| static const char *TAG = "cache"; | ||
|
|
||
| #if SOC_CACHE_WRITEBACK_SUPPORTED | ||
| DEFINE_CRIT_SECTION_LOCK_STATIC(s_spinlock); | ||
|
|
||
| void s_cache_freeze(void) | ||
| { | ||
| #if SOC_CACHE_FREEZE_SUPPORTED | ||
| cache_hal_freeze(CACHE_TYPE_DATA | CACHE_TYPE_INSTRUCTION); | ||
| #endif | ||
|
|
||
| /** | ||
| * For writeback supported, but the freeze not supported chip (Now only S2), | ||
| * as it's single core, the critical section is enough to prevent preemption from an non-IRAM ISR | ||
| */ | ||
| } | ||
|
|
||
| void s_cache_unfreeze(void) | ||
| { | ||
| #if SOC_CACHE_FREEZE_SUPPORTED | ||
| cache_hal_unfreeze(CACHE_TYPE_DATA | CACHE_TYPE_INSTRUCTION); | ||
| #endif | ||
|
|
||
| /** | ||
| * Similarly, for writeback supported, but the freeze not supported chip (Now only S2), | ||
| * we don't need to do more | ||
| */ | ||
| } | ||
| #endif //#if SOC_CACHE_WRITEBACK_SUPPORTED | ||
|
|
||
|
|
||
| esp_err_t esp_cache_msync(void *addr, size_t size, int flags) | ||
| { | ||
| ESP_RETURN_ON_FALSE_ISR(addr, ESP_ERR_INVALID_ARG, TAG, "null pointer"); | ||
| ESP_RETURN_ON_FALSE_ISR(mmu_hal_check_valid_ext_vaddr_region(0, (uint32_t)addr, size, MMU_VADDR_DATA), ESP_ERR_INVALID_ARG, TAG, "invalid address"); | ||
|
|
||
| #if SOC_CACHE_WRITEBACK_SUPPORTED | ||
| if ((flags & ESP_CACHE_MSYNC_FLAG_UNALIGNED) == 0) { | ||
| esp_os_enter_critical_safe(&s_spinlock); | ||
| uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_TYPE_DATA); | ||
| esp_os_exit_critical_safe(&s_spinlock); | ||
|
|
||
| ESP_RETURN_ON_FALSE_ISR(((uint32_t)addr % data_cache_line_size) == 0, ESP_ERR_INVALID_ARG, TAG, "start address isn't aligned with the data cache line size (%d)B", data_cache_line_size); | ||
| ESP_RETURN_ON_FALSE_ISR((size % data_cache_line_size) == 0, ESP_ERR_INVALID_ARG, TAG, "size isn't aligned with the data cache line size (%d)B", data_cache_line_size); | ||
| ESP_RETURN_ON_FALSE_ISR((((uint32_t)addr + size) % data_cache_line_size) == 0, ESP_ERR_INVALID_ARG, TAG, "end address isn't aligned with the data cache line size (%d)B", data_cache_line_size); | ||
| } | ||
|
|
||
| uint32_t vaddr = (uint32_t)addr; | ||
|
|
||
| esp_os_enter_critical_safe(&s_spinlock); | ||
| s_cache_freeze(); | ||
|
|
||
| cache_hal_writeback_addr(vaddr, size); | ||
| if (flags & ESP_CACHE_MSYNC_FLAG_INVALIDATE) { | ||
| cache_hal_invalidate_addr(vaddr, size); | ||
| } | ||
|
|
||
| s_cache_unfreeze(); | ||
| esp_os_exit_critical_safe(&s_spinlock); | ||
| #endif | ||
|
|
||
| return ESP_OK; | ||
| } |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,58 @@ | ||
| /* | ||
| * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
| #pragma once | ||
|
|
||
| #include <stdlib.h> | ||
| #include <stdint.h> | ||
| #include "esp_err.h" | ||
| #include "esp_bit_defs.h" | ||
|
|
||
| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
|
|
||
| /** | ||
| * Cache msync flags | ||
| */ | ||
| /** | ||
| * @brief Do an invalidation with the values that just written | ||
| */ | ||
| #define ESP_CACHE_MSYNC_FLAG_INVALIDATE BIT(0) | ||
| /** | ||
| * @brief Allow writeback a block that are not aligned to the data cache line size | ||
| */ | ||
| #define ESP_CACHE_MSYNC_FLAG_UNALIGNED BIT(1) | ||
|
|
||
|
|
||
| /** | ||
| * @brief Memory sync between Cache and external memory | ||
| * | ||
| * - For cache writeback supported chips (you can refer to SOC_CACHE_WRITEBACK_SUPPORTED in soc_caps.h) | ||
| * - this API will do a writeback to synchronise between cache and the PSRAM | ||
| * - with ESP_CACHE_MSYNC_FLAG_INVALIDATE, this API will also invalidate the values that just written | ||
| * - note: although ESP32 is with PSRAM, but cache writeback isn't supported, so this API will do nothing on ESP32 | ||
| * - For other chips, this API will do nothing. The out-of-sync should be already dealt by the SDK | ||
| * | ||
| * This API is cache-safe and thread-safe | ||
| * | ||
| * @note You should not call this during any Flash operations (e.g. esp_flash APIs, nvs and some other APIs that are based on esp_flash APIs) | ||
| * @note If XIP_From_PSRAM is enabled (by enabling both CONFIG_SPIRAM_FETCH_INSTRUCTIONS and CONFIG_SPIRAM_RODATA), you can call this API during Flash operations | ||
| * | ||
| * @param[in] Starting address to do the msync | ||
| * @param[in] Size to do the msync | ||
| * @param[in] Flags, see `ESP_CACHE_MSYNC_FLAG_x` | ||
| * | ||
| * @return | ||
| * - ESP_OK: | ||
| * - Successful msync | ||
| * - If this chip doesn't support cache writeback, if the input addr is a cache supported one, this API will return ESP_OK | ||
| * - ESP_ERR_INVALID_ARG: Invalid argument, not cache supported addr, see printed logs | ||
| */ | ||
| esp_err_t esp_cache_msync(void *addr, size_t size, int flags); | ||
|
|
||
| #ifdef __cplusplus | ||
| } | ||
| #endif |
59 changes: 59 additions & 0 deletions
59
components/esp_mm/include/esp_private/esp_cache_esp32_private.h
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,59 @@ | ||
| /* | ||
| * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
| #pragma once | ||
|
|
||
| #include <stdlib.h> | ||
| #include <stdint.h> | ||
| #include "esp_err.h" | ||
|
|
||
| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
|
|
||
| /** | ||
| * @brief Private header for cache drivers, where cache functionality requires other components | ||
| * | ||
| * @note Now only esp32, can be applied to other similar chips | ||
| */ | ||
| typedef struct cache_driver_s cache_driver_t; | ||
|
|
||
| /** | ||
| * @brief Cache driver | ||
| */ | ||
| struct cache_driver_s { | ||
|
|
||
| /** | ||
| * @brief Cache flush | ||
| * | ||
| * @param[in] cpu_no CPU id | ||
| */ | ||
| void (*cache_flush)(int cpu_no); | ||
|
|
||
| /** | ||
| * @brief Cache writeback to psram | ||
| */ | ||
| void (*cache_writeback_psram)(void); | ||
| }; | ||
|
|
||
| /** | ||
| * @brief Register cache writeback | ||
| * | ||
| * @param[in] func Cache driver | ||
| */ | ||
| void cache_register_writeback(cache_driver_t *func); | ||
|
|
||
| /** | ||
| * @brief Cache sync | ||
| * | ||
| * @note This API only do cache sync, but doesn't guarantee concurrent access to cache | ||
| * @note Do not use in your application | ||
| */ | ||
| void cache_sync(void); | ||
|
|
||
|
|
||
| #ifdef __cplusplus | ||
| } | ||
| #endif |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,9 @@ | ||
| [mapping:esp_mm] | ||
| archive: libesp_mm.a | ||
| entries: | ||
|
|
||
| if APP_BUILD_TYPE_PURE_RAM_APP = n: | ||
| esp_cache (noflash) | ||
|
|
||
| if IDF_TARGET_ESP32 = y: | ||
| cache_esp32 (noflash) |
Oops, something went wrong.