Merge branch 'feature/eth_loopback_v5.0' into 'release/v5.0'

Ethernet driver fixes backport to v5.0 See merge request espressif/esp-idf!26808
espressif · Dec 20, 2023 · d45d83d · d45d83d
2 parents 4272b44 + 3c8b6d3
commit d45d83d
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Showing 14 changed files with 534 additions and 100 deletions.
diff --git a/components/esp_eth/include/esp_eth_driver.h b/components/esp_eth/include/esp_eth_driver.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -121,6 +121,15 @@ typedef struct {
     esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
 } esp_eth_config_t;
 
+/**
+ * @brief Data structure to Read/Write PHY register via ioctl API
+ *
+ */
+typedef struct {
+    uint32_t reg_addr;              /*!< PHY register address */
+    uint32_t *reg_value_p;          /*!< Pointer to a memory where the register value is read/written */
+} esp_eth_phy_reg_rw_data_t;
+
 /**
 * @brief Command list for ioctl API
 *
@@ -139,6 +148,8 @@ typedef enum {
     ETH_CMD_G_DUPLEX_MODE,            /*!< Get Duplex mode */
     ETH_CMD_S_DUPLEX_MODE,            /*!< Set Duplex mode */
     ETH_CMD_S_PHY_LOOPBACK,           /*!< Set PHY loopback */
+    ETH_CMD_READ_PHY_REG,             /*!< Read PHY register */
+    ETH_CMD_WRITE_PHY_REG,            /*!< Write PHY register */
 
     ETH_CMD_CUSTOM_MAC_CMDS = 0x0FFF, // Offset for start of MAC custom commands
     ETH_CMD_CUSTOM_PHY_CMDS = 0x1FFF, // Offset for start of PHY custom commands

diff --git a/components/esp_eth/include/esp_eth_phy_802_3.h b/components/esp_eth/include/esp_eth_phy_802_3.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,6 +28,144 @@ typedef struct {
     int reset_gpio_num;             /*!< Reset GPIO number, -1 means no hardware reset */
 } phy_802_3_t;
 
+/**
+ * @brief Set Ethernet mediator
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param eth Ethernet mediator pointer
+ * @return
+ *      - ESP_OK: Ethermet mediator set successfuly
+ *      - ESP_ERR_INVALID_ARG: if @c eth is @c NULL
+ */
+esp_err_t esp_eth_phy_802_3_set_mediator(phy_802_3_t *phy_802_3, esp_eth_mediator_t *eth);
+
+/**
+ * @brief Reset PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY reset successfuly
+ *      - ESP_FAIL: reset Ethernet PHY failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_reset(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Control autonegotiation mode of Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param cmd autonegotiation command enumeration
+ * @param[out] autonego_en_stat autonegotiation enabled flag
+ * @return
+ *      - ESP_OK: Ethernet PHY autonegotiation configured successfuly
+ *      - ESP_FAIL: Ethernet PHY autonegotiation configuration fail because some error occured
+ *      - ESP_ERR_INVALID_ARG: invalid value of @c cmd
+ */
+esp_err_t esp_eth_phy_802_3_autonego_ctrl(phy_802_3_t *phy_802_3, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat);
+
+/**
+ * @brief Power control of Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param enable set true to power ON Ethernet PHY; set false to power OFF Ethernet PHY
+ * @return
+ *      - ESP_OK: Ethernet PHY power down mode set successfuly
+ *      - ESP_FAIL: Ethernet PHY power up or power down failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_pwrctl(phy_802_3_t *phy_802_3, bool enable);
+
+/**
+ * @brief Set Ethernet PHY address
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param addr new PHY address
+ * @return
+ *      - ESP_OK: Ethernet PHY address set
+ */
+esp_err_t esp_eth_phy_802_3_set_addr(phy_802_3_t *phy_802_3, uint32_t addr);
+
+/**
+ * @brief Get Ethernet PHY address
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param[out] addr Ethernet PHY address
+ * @return
+ *      - ESP_OK: Ethernet PHY address read successfuly
+ *      - ESP_ERR_INVALID_ARG: @c addr pointer is @c NULL
+ */
+esp_err_t esp_eth_phy_802_3_get_addr(phy_802_3_t *phy_802_3, uint32_t *addr);
+
+/**
+ * @brief Advertise pause function ability
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param ability enable or disable pause ability
+ * @return
+ *      - ESP_OK: pause ability set successfuly
+ *      - ESP_FAIL: Advertise pause function ability failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_advertise_pause_ability(phy_802_3_t *phy_802_3, uint32_t ability);
+
+/**
+ * @brief Set Ethernet PHY loopback mode
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param enable set true to enable loopback; set false to disable loopback
+ * @return
+ *      - ESP_OK: Ethernet PHY loopback mode set successfuly
+ *      - ESP_FAIL: Ethernet PHY loopback configuration failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_loopback(phy_802_3_t *phy_802_3, bool enable);
+
+/**
+ * @brief Set Ethernet PHY speed
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param speed new speed of Ethernet PHY link
+ * @return
+ *      - ESP_OK: Ethernet PHY speed set successfuly
+ *      - ESP_FAIL: Set Ethernet PHY speed failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_set_speed(phy_802_3_t *phy_802_3, eth_speed_t speed);
+
+/**
+ * @brief Set Ethernet PHY duplex mode
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param duplex new duplex mode for Ethernet PHY link
+ * @return
+ *      - ESP_OK: Ethernet PHY duplex mode set successfuly
+ *      - ESP_ERR_INVALID_STATE: unable to set duplex mode to Half if loopback is enabled
+ *      - ESP_FAIL: Set Ethernet PHY duplex mode failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_set_duplex(phy_802_3_t *phy_802_3, eth_duplex_t duplex);
+
+/**
+ * @brief Initialize Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY initialized successfuly
+ */
+esp_err_t esp_eth_phy_802_3_init(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Power off Eternet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY powered off successfuly
+ */
+esp_err_t esp_eth_phy_802_3_deinit(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Delete Ethernet PHY infostructure
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethrnet PHY infostructure deleted
+ */
+esp_err_t esp_eth_phy_802_3_del(phy_802_3_t *phy_802_3);
+
 /**
  * @brief Performs hardware reset with specific reset pin assertion time
  *
@@ -116,7 +254,10 @@ esp_err_t esp_eth_phy_802_3_read_manufac_info(phy_802_3_t *phy_802_3, uint8_t *m
  * @return phy_802_3_t*
  *      - address to parent IEEE 802.3 PHY object infostructure
  */
-phy_802_3_t *esp_eth_phy_into_phy_802_3(esp_eth_phy_t *phy);
+inline __attribute__((always_inline)) phy_802_3_t *esp_eth_phy_into_phy_802_3(esp_eth_phy_t *phy)
+{
+    return __containerof(phy, phy_802_3_t, parent);
+}
 
 /**
  * @brief Initializes configuration of parent IEEE 802.3 PHY object infostructure

diff --git a/components/esp_eth/include/eth_phy_802_3_regs.h b/components/esp_eth/include/eth_phy_802_3_regs.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */

diff --git a/components/esp_eth/src/esp_eth.c b/components/esp_eth/src/esp_eth.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -466,7 +466,26 @@ esp_err_t esp_eth_ioctl(esp_eth_handle_t hdl, esp_eth_io_cmd_t cmd, void *data)
     case ETH_CMD_S_PHY_LOOPBACK:
         ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "can't set loopback to null");
         ESP_GOTO_ON_ERROR(phy->loopback(phy, *(bool *)data), err, TAG, "configuration of phy loopback mode failed");
-
+        break;
+    case ETH_CMD_READ_PHY_REG: {
+            uint32_t phy_addr;
+            ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "invalid register read/write info");
+            esp_eth_phy_reg_rw_data_t *phy_r_data = (esp_eth_phy_reg_rw_data_t *)data;
+            ESP_GOTO_ON_FALSE(phy_r_data->reg_value_p, ESP_ERR_INVALID_ARG, err, TAG, "can't read registers to null");
+            ESP_GOTO_ON_ERROR(phy->get_addr(phy, &phy_addr), err, TAG, "get phy address failed");
+            ESP_GOTO_ON_ERROR(eth_driver->mediator.phy_reg_read(&eth_driver->mediator,
+                            phy_addr, phy_r_data->reg_addr, phy_r_data->reg_value_p), err, TAG, "failed to read PHY register");
+        }
+        break;
+    case ETH_CMD_WRITE_PHY_REG: {
+            uint32_t phy_addr;
+            ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "invalid register read/write info");
+            esp_eth_phy_reg_rw_data_t *phy_w_data = (esp_eth_phy_reg_rw_data_t *)data;
+            ESP_GOTO_ON_FALSE(phy_w_data->reg_value_p, ESP_ERR_INVALID_ARG, err, TAG, "can't write registers from null");
+            ESP_GOTO_ON_ERROR(phy->get_addr(phy, &phy_addr), err, TAG, "get phy address failed");
+            ESP_GOTO_ON_ERROR(eth_driver->mediator.phy_reg_write(&eth_driver->mediator,
+                            phy_addr, phy_w_data->reg_addr, *(phy_w_data->reg_value_p)), err, TAG, "failed to write PHY register");
+        }
         break;
     default:
         if (phy->custom_ioctl != NULL && cmd >= ETH_CMD_CUSTOM_PHY_CMDS) {

diff --git a/components/esp_eth/src/esp_eth_mac_esp.c b/components/esp_eth/src/esp_eth_mac_esp.c
@@ -628,7 +628,6 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_esp32_emac_config_t *esp32_config
     emac->smi_mdio_gpio_num = esp32_config->smi_mdio_gpio_num;
     emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
     emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
-    emac->use_apll = false;
     emac->parent.set_mediator = emac_esp32_set_mediator;
     emac->parent.init = emac_esp32_init;
     emac->parent.deinit = emac_esp32_deinit;

diff --git a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: MIT
  *
- * SPDX-FileContributor: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2021-2023 Espressif Systems (Shanghai) CO LTD
  */
 
 #include <string.h>
@@ -226,7 +226,7 @@ static esp_err_t init_set_defaults(emac_ksz8851snl_t *emac)
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDTTR, RXDTTR_INIT_VALUE), err, TAG, "RXDTTR write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDBCTR, RXDBCTR_INIT_VALUE), err, TAG, "RXDBCTR write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR1,
-                                       RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME), err, TAG, "RXCR1 write failed");
+                                       RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXMAFMA | RXCR1_RXAE), err, TAG, "RXCR1 write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR2,
                                        (4 << RXCR2_SRDBL_SHIFT) | RXCR2_IUFFP | RXCR2_RXIUFCEZ | RXCR2_UDPLFE | RXCR2_RXICMPFCC), err, TAG, "RXCR2 write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXQCR, RXQCR_RXFCTE | RXQCR_ADRFE), err, TAG, "RXQCR write failed");
@@ -599,13 +599,13 @@ static esp_err_t emac_ksz8851_set_promiscuous(esp_eth_mac_t *mac, bool enable)
     if (enable) {
         // NOTE(v.chistyakov): set promiscuous mode
         ESP_LOGD(TAG, "setting promiscuous mode");
-        rxcr1 |= RXCR1_RXINVF | RXCR1_RXAE;
+        rxcr1 |= RXCR1_RXAE | RXCR1_RXINVF;
         rxcr1 &= ~(RXCR1_RXPAFMA | RXCR1_RXMAFMA);
     } else {
         // NOTE(v.chistyakov): set hash perfect (default)
-        ESP_LOGD(TAG, "setting hash perfect mode");
-        rxcr1 |= RXCR1_RXPAFMA;
-        rxcr1 &= ~(RXCR1_RXINVF | RXCR1_RXAE | RXCR1_RXMAFMA);
+        ESP_LOGD(TAG, "setting perfect with multicast passed");
+        rxcr1 |= RXCR1_RXAE| RXCR1_RXPAFMA | RXCR1_RXMAFMA;
+        rxcr1 &= ~RXCR1_RXINVF;
     }
     ESP_GOTO_ON_ERROR(ksz8851_write_reg(emac, KSZ8851_RXCR1, rxcr1), err, TAG, "RXCR1 write failed");
 err: