[TW#23301] When num_pin set to GPIO25, gpio bootloader_common_check_long_hold_gpio will not work proerly (IDFGH-4698)

[mashaoze]

When num_pin set to GPIO25, gpio bootloader_common_check_long_hold_gpio will not work proerly. this function always return GPIO_LONG_HOLD, event if the pin is not pull down. Because GPIO25 is also used by RTC and DAC/ADC, need set peripheral register in addition.

[bart112233]

Pins 24,25,32-39 is not enabled on reset, so need to enable it. Something like:

#include "soc/io_mux_reg.h"**
...
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec)
{
       //-------------------------------------------------------------------------------------------------------
	const uint32_t disabled_io2[]={IO_MUX_GPIO32_REG, IO_MUX_GPIO33_REG, IO_MUX_GPIO34_REG, IO_MUX_GPIO35_REG, IO_MUX_GPIO36_REG, IO_MUX_GPIO37_REG, IO_MUX_GPIO38_REG, IO_MUX_GPIO39_REG};
	const uint32_t disabled_io1[]={IO_MUX_GPIO25_REG, IO_MUX_GPIO26_REG};
	switch (num_pin) {
		case 25 ... 26:
			PIN_INPUT_ENABLE(disabled_io1[num_pin-25]);
			break;
		case 32 ... 39:
			PIN_INPUT_ENABLE(disabled_io2[num_pin-32]);
			break;
		default:
			break;
	}
    //-------------------------------------------------------------------------------------------------------
    gpio_pad_select_gpio(num_pin);
    gpio_pad_pullup(num_pin);
    uint32_t tm_start = esp_log_early_timestamp();
    if (GPIO_INPUT_GET(num_pin) == 1) {
        return GPIO_NOT_HOLD;
    }
    do {
        if (GPIO_INPUT_GET(num_pin) != 0) {
            return GPIO_SHORT_HOLD;
        }
    } while (delay_sec > ((esp_log_early_timestamp() - tm_start) / 1000L));
    return GPIO_LONG_HOLD;
}