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Remove validation of pins for LCD output. (IDFGH-12038) #13103

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There are a bunch of cases you might want some pins not exposed.

Eg.

  • Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

  • Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

  • Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.

Removing this validation makes these cases work.

There are a bunch of cases you might want some pins not exposed.

Eg.

  * Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

 * Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

 * Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.


Removing this validation makes these cases work.
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CLAassistant commented Feb 4, 2024

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All committers have signed the CLA.

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github-actions bot commented Feb 4, 2024

Fails
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node failed.

Warnings
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Some issues found for the commit messages in this PR:

  • the commit message "Remove validation of pins for LCD output.":
    • body's lines must not be longer than 100 characters
    • summary should not end with a period (full stop)
    • summary looks empty
    • type/action looks empty

Please fix these commit messages - here are some basic tips:

  • follow Conventional Commits style
  • correct format of commit message should be: <type/action>(<scope/component>): <summary>, for example fix(esp32): Fixed startup timeout issue
  • allowed types are: change,ci,docs,feat,fix,refactor,remove,revert,test
  • sufficiently descriptive message summary should be between 20 to 72 characters and start with upper case letter
  • avoid Jira references in commit messages (unavailable/irrelevant for our customers)

TIP: Install pre-commit hooks and run this check when committing (uses the Conventional Precommit Linter).

Log

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│    6    │    'ENABLE_OUTPUT_INSTRUCTIONS'     │                         true                          │          'default'           │
│    7    │             'CLA_LINK'              │     'https://cla-assistant.io/espressif/esp-idf'      │   'custom (default is: )'    │
│    8    │   'COMMIT_MESSAGE_ALLOWED_TYPES'    │ 'change,ci,docs,feat,fix,refactor,remove,revert,test' │          'default'           │
│    9    │      'CONTRIBUTING_GUIDE_FILE'      │                   'CONTRIBUTING.md'                   │   'custom (default is: )'    │
│   10    │   'IGNORED_SECTIONS_DESCRIPTION'    │              'related,release,breaking'               │          'default'           │
│   11    │         'IS_GITLAB_MIRROR'          │                         true                          │ 'custom (default is: false)' │
│   12    │   'MAX_COMMIT_MESSAGE_BODY_LINE'    │                          100                          │          'default'           │
│   13    │    'MAX_COMMIT_MESSAGE_SUMMARY'     │                          72                           │          'default'           │
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│   18    │     'MIN_PR_DESCRIPTION_LENGTH'     │                          50                           │          'default'           │
└─────────┴─────────────────────────────────────┴───────────────────────────────────────────────────────┴──────────────────────────────┘
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danger-results://tmp/danger-results-8399f4e1.json

Generated by 🚫 dangerJS against a2e0b98

@espressif-bot espressif-bot added the Status: Opened Issue is new label Feb 4, 2024
@github-actions github-actions bot changed the title Remove validation of pins for LCD output. Remove validation of pins for LCD output. (IDFGH-12038) Feb 4, 2024
@suda-morris
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sha=a2e0b9891fe23a31aa364a74382c6ce09381e1c6

@suda-morris suda-morris added the PR-Sync-Merge Pull request sync as merge commit label Feb 5, 2024
@espressif-bot espressif-bot added Status: In Progress Work is in progress Status: Reviewing Issue is being reviewed Status: Done Issue is done internally Resolution: NA Issue resolution is unavailable and removed Status: Opened Issue is new Status: In Progress Work is in progress Status: Reviewing Issue is being reviewed labels Feb 5, 2024
espressif-bot pushed a commit that referenced this pull request Feb 8, 2024
There are a bunch of cases you might want some pins not exposed.

Eg.

  * Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

 * Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

 * Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.

Removing this validation makes these cases work.

Merges #13103
espressif-bot pushed a commit that referenced this pull request Feb 20, 2024
There are a bunch of cases you might want some pins not exposed.

Eg.

  * Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

 * Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

 * Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.

Removing this validation makes these cases work.

Merges #13103
espressif-bot pushed a commit that referenced this pull request Mar 1, 2024
There are a bunch of cases you might want some pins not exposed.

Eg.

  * Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

 * Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

 * Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.

Removing this validation makes these cases work.

Merges #13103
espressif-bot pushed a commit that referenced this pull request Mar 1, 2024
There are a bunch of cases you might want some pins not exposed.

Eg.

  * Reading say 8 bit data and outputting the top 5 bits, discarding the rest by not mapping those data pins to output pins

 * Not using hsync/vsync because sync data is embedded within the data bits for more timing flexibility (eg. interlacing).

 * Using the LCD module as a high speed parallel data output bus, with no need for sync/control pins.

Removing this validation makes these cases work.

Merges #13103
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