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espefuse.py: No stub support for write commands? (ESPTOOL-674) #873

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someburner opened this issue Apr 20, 2023 · 8 comments
Closed

espefuse.py: No stub support for write commands? (ESPTOOL-674) #873

someburner opened this issue Apr 20, 2023 · 8 comments

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@someburner
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someburner commented Apr 20, 2023

Due to some engineering / time constraints, our programming fixture doesn't have the ability to hard reset the ESP32 in a single programming "session" (e.g. toggling rts/cts etc has no effect). Once the chip has entered stub mode, you can read efuses, but cannot write them.

For example, using an ESP Prog jumper programmer you can emulate this behavior:

export ESP_PORT=/dev/ttyUSB0

# put chip into stub mode
./esptool.py --chip esp32 -p $ESP_PORT --after no_reset_stub flash_id

# keep in stub mode - reads OK
espefuse.py --chip esp32 --port $ESP_PORT --before no_reset summary

# keep in stub mode - writes fail
espefuse.py --port $ESP_PORT --before no_reset --do-not-confirm burn_efuse FLASH_CRYPT_CNT 0x7F

The issue appears to be due to stub loader expecting different status byte lengths:

class ESP32StubLoader(ESP32ROM):
    """Access class for ESP32 stub loader, runs on top of ROM."""

    FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
    STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
    IS_STUB = True

but current espefuse.py appears to have no way to load those overrides. I thought perhaps stub loader might not be suited for efuses but I saw this commit: 343bca1

I'm using a hacked up version of esptool and passing an esp object around, and found these changes actually work well:
esptool.patch.txt

So not sure if this is a bug/oversight, a needed feature, or if programming efuses with the stub is not recommended.

@github-actions github-actions bot changed the title espefuse.py: No stub support for write commands? espefuse.py: No stub support for write commands? (ESPTOOL-674) Apr 20, 2023
@KonstantinKondrashov
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Hi @someburner!
The way that you have tried should work. I will check out this feature to make it workable.
Thanks for the good description.

@someburner
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Also, you can test this behavior without burning any fuses, it errors out before anything is actually written.

@KonstantinKondrashov
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Hi @someburner!
I do not see any issue with the following setup (I think it is the same case as yours, correct me if your case is different):

  • ESP32 is connected to the USB-SERIAL with only RX, TX, and GND. This COM port is used for the connection (flash/burn).
  • ESP32's EN and BOOT are not connected to the USB-SERIAL. (you said that your case does not have the ability to hard reset, e.g. toggling rts/cts etc has no effect.). I manually connect to GND to go to download mode. I do it in the following sequence:
    • EN ->GND, (keep it)
    • BOOT -> GND, (keep it)
    • Release EN,
    • Release BOOT.
    • Chip goes into the Download mode.
  • When the chip is in the Download mode using any --after or --before does not make sense because EN and BOOT are not connected to the chip.
  • Then you can use any commands from esptool and espefuse.
> esptool.py chip_id
esptool.py v4.6-dev
Found 1 serial ports
Serial port /dev/ttyUSB0
Connecting....
Detecting chip type... Unsupported detection protocol, switching and trying again...
Connecting...
Detecting chip type... ESP32
Chip is ESP32-D0WDQ6 (revision v0.0)
Features: WiFi, BT, Dual Core, Coding Scheme None
Crystal is 40MHz
MAC: 00:00:00:00:00:00
Uploading stub...
Running stub...
Stub running...
Warning: ESP32 has no Chip ID. Reading MAC instead.
MAC: 00:00:00:00:00:00
Hard resetting via RTS pin...  <- It does not happen because RTS is not connected, so chip is still in stub

> esptool.py chip_id
esptool.py v4.6-dev
Found 1 serial ports
Serial port /dev/ttyUSB0
Connecting...
Detecting chip type... Unsupported detection protocol, switching and trying again...
Connecting...
Detecting chip type... ESP32
Chip is ESP32-D0WDQ6 (revision v0.0)
Features: WiFi, BT, Dual Core, Coding Scheme None
Crystal is 40MHz
MAC: 00:00:00:00:00:00
Stub is already running. No upload is necessary.
Warning: ESP32 has no Chip ID. Reading MAC instead.
MAC: 00:00:00:00:00:00
Hard resetting via RTS pin...  <- It does not happen because RTS is not connected, so chip is still in stub

> espefuse.py --port /dev/ttyUSB0  --do-not-confirm burn_bit BLOCK3 246
espefuse.py v4.6-dev
Connecting...
Detecting chip type... Unsupported detection protocol, switching and trying again...
Connecting...
Detecting chip type... ESP32
=== Run "burn_bit" command ===
bit_number:   [255]........................................................[0]
BLOCK3    : 0x0040000000000000000000000000000000000000000000000000000000000000
BLOCK3          (                ) [3 ] regs_to_write: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00400000
Check all blocks for burn...
idx, BLOCK_NAME,          Conclusion
[03] BLOCK3               is not empty
        (written ): 0xfe80000000000000000000000000000000000000000000000000000000000000
        (to write): 0x0040000000000000000000000000000000000000000000000000000000000000
        (coding scheme = NONE)
This is an irreversible operation!
BURN BLOCK3  - OK (all write block bits are set)
Reading updated efuses...
Successful

@KonstantinKondrashov
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@someburner
Please help to reach your case.

According to your fix. Will this fix work for you as well?

diff --git a/espefuse/__init__.py b/espefuse/__init__.py
index 681a9ba..6a4ff50 100755
--- a/espefuse/__init__.py
+++ b/espefuse/__init__.py
@@ -178,6 +178,14 @@ def main(custom_commandline=None):
         default="default_reset",
     )
 
+    init_parser.add_argument(
+        "--after",
+        "-a",
+        help="What to do after espefuse.py is finished",
+        choices=["hard_reset", "soft_reset", "no_reset", "no_reset_stub"],
+        default="no_reset",
+    )
+
     init_parser.add_argument(
         "--debug",
         "-d",
@@ -276,6 +284,18 @@ def main(custom_commandline=None):
             if not efuses.burn_all(check_batch_mode=True):
                 raise esptool.FatalError("BURN was not done")
     finally:
+        if args.after == "hard_reset":
+            esp.hard_reset()
+        elif args.after == "soft_reset":
+            print("Soft resetting...")
+            esp.soft_reset(False)
+        elif args.after == "no_reset_stub":
+            print("Staying in flasher stub.")
+        else:  # args.after == 'no_reset'
+            print("Staying in bootloader.")
+            if esp.IS_STUB:
+                esp.soft_reset(True)  # exit stub back to ROM loader
+
         if not common_args.virt and esp._port:
             esp._port.close()

What is the reason do not close the port? Do you want to burn some efuses? We have a batch mode for this https://docs.espressif.com/projects/esptool/en/latest/esp32/espefuse/index.html#perform-multiple-operations-in-a-single-espefuse-run

@someburner
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someburner commented May 1, 2023

Did you try my steps with an ESP Prog adapter? I don't believe the issue is specifically tied to our manufacturing setup. In our case, however, I don't think we can release the EN -> Gnd or Boot -> Gnd. In the case of using ESP Prog it seems like the commands I listed for that should work- shouldn't they?

The part about not closing serial is just due to me passing in an existing esp object, but if I can get the write command to work while it's in stub mode then that wouldn't be necessary.

Thanks for trying it out though. I'll have to double check on my end.

@KonstantinKondrashov
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Yes, I tried your steps with the ESP-Prog adapter.

> esptool.py -b 115200  --chip esp32 -p /dev/ttyUSB1 --after no_reset_stub    flash_id
esptool.py v4.6-dev
Serial port /dev/ttyUSB1
Connecting....
Chip is ESP32-D0WD-V3 (revision v3.0)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None
Crystal is 40MHz
MAC: 94:b9:7e:59:7c:b4
Uploading stub...
Running stub...
Stub running...
Manufacturer: 20
Device: 4016
Detected flash size: 4MB
Staying in flasher stub.

Here you can see that the chip is in "Staying in flasher stub". To make sure that after this cmd the chip is really in the stub state you can run the same cmd but with --before no_reset :

> esptool.py -b 115200  --chip esp32 -p /dev/ttyUSB1 --after no_reset_stub  --before no_reset  flash_id
esptool.py v4.6-dev
Serial port /dev/ttyUSB1
WARNING: Pre-connection option "no_reset" was selected. Connection may fail if the chip is not in bootloader or flasher stub mode.
Connecting...
Chip is ESP32-D0WD-V3 (revision v3.0)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None
Crystal is 40MHz
MAC: 94:b9:7e:59:7c:b4
Stub is already running. No upload is necessary.
Manufacturer: 20
Device: 4016
Detected flash size: 4MB
Staying in flasher stub.

The msg says that the chip is in "Stub is already running. No upload is necessary".

> espefuse.py --chip esp32 --port /dev/ttyUSB1  --before no_reset summary
espefuse.py v4.6-dev
WARNING: Pre-connection option "no_reset" was selected. Connection may fail if the chip is not in bootloader or flasher stub mode.
Connecting...
=== Run "summary" command ===
....

Summary cmd works, and the chip is still in stub mode. You can make sure it running esptool.py -b 115200 --chip esp32 -p /dev/ttyUSB1 --after no_reset_stub --before no_reset flash_id again.

Then run burning efuses (I use burn_bit cmd, it does not matter which burn cmd is used, but I also tried your's cmd)

> espefuse.py --port /dev/ttyUSB1 --before no_reset --after no_reset_stub  --do-not-confirm burn_bit BLOCK3 246
espefuse.py v4.6-dev
WARNING: Pre-connection option "no_reset" was selected. Connection may fail if the chip is not in bootloader or flasher stub mode.
...
BURN BLOCK3  - OK (all write block bits are set)
Reading updated efuses...
Successful

In the case of using ESP Prog it seems like the commands I listed for that should work- shouldn't they?

Yes, they should work.

keep in stub mode - writes fail
espefuse.py --port $ESP_PORT --before no_reset --do-not-confirm burn_efuse FLASH_CRYPT_CNT 0x7F

BTW, you can provide the log with all these cmds including the error.

FYI, you did not mention which esptool version you use. I tested on the latest version.

The part about not closing serial is just due to me passing in an existing esp object,

I can add this feature.

@KonstantinKondrashov
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patch_espefuse_expernal_esp_instance.txt
Please take a look this patch. Is it good for your case?
I did not take the --noclose flag into this patch because it looks excessively becuase if an esp instanse was given from above layer then that layer should be responsible for closing and connection to a chip.

@someburner
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@KonstantinKondrashov yes that's great, thank you

I will try again soon. strange it wasn't working for me but thank you for confirming. I'll tag you in a comment if I get the error again.

Jason2866 added a commit to Jason2866/esptool that referenced this issue Nov 4, 2023
* docs: espsecure remote signing using a HSM broken link fix

* fix(rfc2217_server): Use new reset sequences

* fix(ESP32-S3): Lower CPU freq to improve flasher stub stability

Closes espressif#832

* fix: Unknown chip (ID or magic number) error

* pyinstaller: fix glibc dependency on gnu/linux

pyinstaller package for linux is built within the ubuntu-latest image in
github workflow. This may cause prbolem with glibc symbol versions on
older distributions, where the new symbol versions are not available.
Fix this by building on the older ubuntu version.

Closes espressif#843

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>

* tests: Create custom `host_test` marker for tests without real chip connected

Closes espressif#838

* fix(ESP32-S3): Temporarily disable increasing CPU freq

Related to espressif#848

Related to espressif#842

* build: add esp_rfc2217_server to published scripts

Closes espressif#846

* Update version to v4.5.1

* Update version to v4.6-dev

* espefuse: Hide sensitive info by default during burning burn_key and burn_key_digest

Adds --show-sensitive-info flag for two commands:
burn_key and burn_key_digest.

* flasher_stub: pass -mabi=ilp32 to the RISC-V compiler

This is a no-op change for the upstream toolchain (compiled stubs are
binary identical), but is required when building with Debian's
riscv64-unknown-elf-gcc compiler.

* flasher_stub: allow passing extra CFLAGS

The flasher_stub Makefile allows for some system-local configuration,
either through local.mk, or through environment variables.

For example, the compiler prefix can be overridden, by defining e.g.
CROSS_ESPRISCV32. However, passing additional flags to the compiler
isn't possible right now. Add EXTRA_CFLAGS and EXTRA_CFLAGS_ESPRISCV32
to allow for that option.

* flasher_stub: collect all targets at the top, DRY

* flasher_stub: make target selection more modular

Rather than a special "make esp32", create WITHOUT_* variables to
selectively disable chip families. Currently, WITHOUT_ESP8266,
WITHOUT_ESP32_XTENSA and WITHOUT_ESP32_RISCV32 are defined, but the code
can be easily adjusted to allow for all kinds of other
sets/combinations.

* flasher_stub: create %.json targets, make all a proper PHONY

* flasher_stub: drop --embed from wrap_stub.py

Since commit 94f29a5 the flasher stub is not embedded in the Python
source, but rather included as simple json files.

As such, wrap_stub.py --embed was converted to basically just vary the
build dir. Rather than keep this indirection and for better clarity,
remove that piece of code and replace it by a simple "cp" in the
Makefile.

While at it, replace the target name from "embed" to "install", as this
more akin to a "make install" step.

* espefuse: Support burning ECDSA_KEY from pem file

- fix some assert check in test_espefuse.py
- add tests to cover the new functionality

* espefuse(c2): Fix BLOCK_KEY0 view for summary cmd when SB + FE keys are burnt

For C2 secure boot + flash enc block, we saw that in summary cmd
"0's" from secure boot digest part (upper 128 bit) were translated
into "?'s" when the block was read protected.
For C2, we should apply this translation for lower 128 bits only.

* fix(ESP32-C6): Fix get_pkg_version and get_{major,minor}_chip_version

* image_info: removed check that reserved bytes in image header are zero

IDF may start using parts of the reserved bytes in the extended header at any time,
which will break chip auto-detect in image_info.

* build: limit max cryptography version to 40

* fix: Set flash parameters even with --flash_size keep

Related to espressif/esp-idf#10788

Related to espressif/esp-idf#10959

* build: add arm and arm64 as build target

Closes espressif#845

* Fix typo in serial protocol docs

Fixes misspelling of `triggered` in serial protocol docs.

Signed-off-by: hasheddan <georgedanielmangum@gmail.com>

* Support more recent reedsolo packages

- https://github.com/tomerfiliba-org/reedsolomon/releases/tag/v1.6.1 - this seems to be related to licenses only.
- https://github.com/tomerfiliba-org/reedsolomon/releases/tag/v1.7.0 - this is related to installation.

Closes espressif#872

* build(arm): add pip extra url for github action build

* ci: Fix libffi symlinks for cryptography>=40

* espefuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5)

eFuse module has a hardware bug.
It is related to ESP32-C3, C6, S3, H2 chips:
    - BLOCK9 (BLOCK_KEY5) can not be used by XTS_AES keys.
For H2 chips, the BLOCK9 (BLOCK_KEY5) can not be used by ECDSA keys.
S2 does not have such a hardware bug.

* image_info: Display disabled WP pin as disabled

The image formats know about the special value 0xee used to disable WP.
Display this with image_info.

E.g.:

ESP32-C3 extended image header
==============================
WP pin: 0xee (disabled)

* image_info: Print chip ID's name if known

Example:

Flash pins drive settings: clk_drv: 0x0, q_drv: 0x0, d_drv: 0x0, cs0_drv: 0x0, hd_drv: 0x0, wp_drv: 0x0
Chip ID: 5 (ESP32-C3)
Minimal chip revision: v0.0, (legacy min_rev = 0)
Maximal chip revision: v655.35

An unknown ID will be printed as:

Chip ID: 42 (Unknown ID)

* tests: Make the testsuite Windows compatible

* espefuse: Adds external esp instance

Closes espressif#873

* espefuse: Improve efuse error viewing

* espefuse: Explicit setting of efuse time settings

EFUSE_PWR_ON_NUM in C3 has default value = 0x2880, now = 0x3000

* docs(Boot log): Add all esp targets to cover boot troubleshooting

Closes espressif#732

* fix: USB-JTAG-Serial PID detection error

* esptool: Move bootdesc on the top of the ram segment

* espefuse: Move some vars under init method to speedup tool after adding yaml support

* espefuse: Adds yaml efuse description files for all chip

- esptool: Updates eFuses wafer major&minor versions
- esptool(esp32c6): Adds package versions
- espefuse(esp32c6): Replace PKG_VERSION BLK_VERSION_MINOR BLK_VERSION_MAJOR
- espefuse(esp32c6): Adds adc calib efuses
- espefuse: Adds yaml files for Build with PyInstaller

* efuse(H2): Adds RF Calibration Information

* espsecure: Improve error message for incorrect PEM format

Closes espressif#881

* bugfix(usb_jtag_serial): Autofeed super watchdog (SWD) to avoid resets during flashing

* esptool: Read 64-bit MAC address on C6 and H2

* bugfix: Adjust wrapper scripts to not import themselves

* bugfix(espsecure): Print a clear error message if incompatible OpenSSL backend is used

Closes espressif#878

* fix: inconsistent usage of dirs separator

* feat(esptool): add option to dump whole flash based on detected size

Closes espressif#461

* Update version to v4.6

* Update version to v4.7-dev

* fix(ESP32-S3): Correct RTC WDT registers to fix resets during flashing

* Update version to v4.6.1

* Update version to v4.7-dev

* docs: add explanation for flash_id example to avoid confusion

* docs(boot-log): fix list formatting

* docs: add c2, c6 and h2 as build targets

* fix(compressed upload): Accept short data blocks with only Adler-32 bytes

* fix(CH9102F): Suggest to install new serial drivers if writing to RAM fails

* esptool & espefuse: Fix byte order in MAC (for C6 and H2)

MAC: 60:55:f9:ff:fe:f7:2c:a2 (EUI64, used for IEEE802154)
BASE MAC: 60:55:f9:f7:2c:a2 (used for BT)
MAC_EXT: ff:fe

* Update version to v4.6.2

* Update version to v4.7

* change: Add conventional precommit linter

* ci(pre-commit): Update version of `conventional-precommit-linter`

* feat(get_security_info): Improved the output format and added more
details

* fix(esp32-c2): Enable flashing in secure download mode

Closes espressif#895

* ci: Add DangerJS checks to GL and GH

* feat(esptool): Add PICO package for ESP32S3 and flash/psram efuses

* feat(esptool): Add tests for get_chip_features

* feat(esptool): Add new packages for ESP32C3 and flash efuses

* fix(expand file args): Correctly print the expanded command

* feat(espsecure): Allow prompting for HSM PIN in read_hsm_config

If hsm_config does not contain "credentials" the user will be
prompted for the HSM PIN.

This avoids the need to have HSM PINs typed in config files
which is not a good security practice.

ADJUNCT: Updated documentation to reflect new usage

Closes espressif#900

* fix(dangerGH): Update token permissions - allow Danger to add comments to PR

* fix(elf2image): fix text/rodata mapping overlap issue on uni-idrom bus chips

* fix: assert in esp32 exclusive workaround

* docs: Add other resources page

* fix(autodetection): Remove the ESP32-S2 ROM class from get_security_info autodetection

* change(pre-commit): Bump version conventional-precommit-linter to 1.2.1

* feat(esptool): added target to esp32p4

* feat(espefuse): Add support for esp32p4 chip

* fix: Fix redirection of STDOUT

Closes espressif#904

* fix(danger-github): Fir Danger GitHub token permission

* ci(danger-github): Fix github-action-bot permissions for posting Danger output

* ci: Shared danger to local stage (remove possible double CI pipelines)

* ci: add 'flake8-import-order' as a dependecy to flake8

* fix(bin_image): Check only ELF sections when searching for .flash.appdesc

Closes espressif#917

* feat(efuse): ESP32P4 adds ecdsa_key support

* feat(efuse): Update key purpose table and tests

* feat(esp32-s3): Support >16MB quad flash chips

Adds support for the W25Q256 and GD25Q256 flash chips.

Closes espressif#883

* ci(dev_release): Upload dev releases to PyPI with GH Actions

* ci: fix pipeline for building docs

* feat(merge_bin): add support for uf2 format

* feat(esp32c3): Support ECO6 and ECO7 magic numbers

* ci(gitlab_ci): Change only/except syntax to rules

* fix(flasher_stub): fix usb-serial-jtag enabled non-related intr source

* fix(loader): Could not open serial port message adjusted

* ci(gitlab): Fix deploying docs to production

* ci(github): Fix pyinstaller builds on ubuntu

* docs(basic-commands): added note for PowerShell users for merge_bin command

Closes espressif#923

* feat: Add support for Python 3.12

* feat(loader): Added hints for some serial port issues when rising port error

Closes espressif/esp-idf#12366

* feat: add support for get_security_info on esp32c3 ECO7

* docs(troubleshooting): Explain issues when flashing with USB-Serial/JTAG or USB-OTG

Closes espressif#924

* feat(espefuse): Update the way to complete the operation

* docs(boot_mode_selection): Correct secondary strapping pin boot mode levels

Closes espressif#928

* feat(espefuse): Adds efuse ADC calibration data for ESP32H2

* feat(rfc2217_server): Add hard reset sequence

* feat(elf2image): add ram-only-header argument

The ram-only-header configuration makes only
the RAM segments visible to the ROM bootloader placing
them at the beginning of the file and altering the
segment count from the image header with the quantity
of these segments, and also writing only their
checksum. This segment placement also may not result
as optimal as the standard way regarding the padding
gap use among the flash segments that could result
in a less fragmented binary.

The image built must then handle the basic hardware
initialization and the flash mapping for code execution
after ROM bootloader boot it.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
Signed-off-by: Almir Okato <almir.okato@espressif.com>

* feat(esp32p4): Stub flasher support

* refactor(stub_flasher): Cleanup, make adding new targets easier

* feat: add support for intel hex format

---------

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
Signed-off-by: hasheddan <georgedanielmangum@gmail.com>
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Co-authored-by: harshal.patil <harshal.patil@espressif.com>
Co-authored-by: radim.karnis <radim.karnis@espressif.com>
Co-authored-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
Co-authored-by: Peter Dragun <peter.dragun@espressif.com>
Co-authored-by: KonstantinKondrashov <konstantin@espressif.com>
Co-authored-by: Faidon Liambotis <paravoid@debian.org>
Co-authored-by: XiNGRZ <hi@xingrz.me>
Co-authored-by: Marius Vikhammer <marius.vikhammer@espressif.com>
Co-authored-by: hasheddan <georgedanielmangum@gmail.com>
Co-authored-by: Roland Dobai <roland@espressif.com>
Co-authored-by: Trent Piepho <tpiepho@gmail.com>
Co-authored-by: Dean Gardiner <me@dgardiner.net>
Co-authored-by: Massimiliano Montagni <massimiliano@solutiontech.tech>
Co-authored-by: Tomas Sebestik <tomas.sebestik@espressif.com>
Co-authored-by: Aditya Patwardhan <aditya.patwardhan@espressif.com>
Co-authored-by: Richard Retanubun <richard.retanubun@mmbnetworks.com>
Co-authored-by: wuzhenghui <wuzhenghui@espressif.com>
Co-authored-by: Armando <douyiwen@espressif.com>
Co-authored-by: Jakub Kocka <jakub.kocka@espressif.com>
Co-authored-by: 20162026 <36726858+20162026@users.noreply.github.com>
Co-authored-by: Almir Okato <almir.okato@espressif.com>
Jason2866 added a commit to Jason2866/esptool that referenced this issue Nov 7, 2023
* docs: espsecure remote signing using a HSM broken link fix

* fix(rfc2217_server): Use new reset sequences

* fix(ESP32-S3): Lower CPU freq to improve flasher stub stability

Closes espressif#832

* fix: Unknown chip (ID or magic number) error

* pyinstaller: fix glibc dependency on gnu/linux

pyinstaller package for linux is built within the ubuntu-latest image in
github workflow. This may cause prbolem with glibc symbol versions on
older distributions, where the new symbol versions are not available.
Fix this by building on the older ubuntu version.

Closes espressif#843

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>

* tests: Create custom `host_test` marker for tests without real chip connected

Closes espressif#838

* fix(ESP32-S3): Temporarily disable increasing CPU freq

Related to espressif#848

Related to espressif#842

* build: add esp_rfc2217_server to published scripts

Closes espressif#846

* Update version to v4.5.1

* Update version to v4.6-dev

* espefuse: Hide sensitive info by default during burning burn_key and burn_key_digest

Adds --show-sensitive-info flag for two commands:
burn_key and burn_key_digest.

* flasher_stub: pass -mabi=ilp32 to the RISC-V compiler

This is a no-op change for the upstream toolchain (compiled stubs are
binary identical), but is required when building with Debian's
riscv64-unknown-elf-gcc compiler.

* flasher_stub: allow passing extra CFLAGS

The flasher_stub Makefile allows for some system-local configuration,
either through local.mk, or through environment variables.

For example, the compiler prefix can be overridden, by defining e.g.
CROSS_ESPRISCV32. However, passing additional flags to the compiler
isn't possible right now. Add EXTRA_CFLAGS and EXTRA_CFLAGS_ESPRISCV32
to allow for that option.

* flasher_stub: collect all targets at the top, DRY

* flasher_stub: make target selection more modular

Rather than a special "make esp32", create WITHOUT_* variables to
selectively disable chip families. Currently, WITHOUT_ESP8266,
WITHOUT_ESP32_XTENSA and WITHOUT_ESP32_RISCV32 are defined, but the code
can be easily adjusted to allow for all kinds of other
sets/combinations.

* flasher_stub: create %.json targets, make all a proper PHONY

* flasher_stub: drop --embed from wrap_stub.py

Since commit 94f29a5 the flasher stub is not embedded in the Python
source, but rather included as simple json files.

As such, wrap_stub.py --embed was converted to basically just vary the
build dir. Rather than keep this indirection and for better clarity,
remove that piece of code and replace it by a simple "cp" in the
Makefile.

While at it, replace the target name from "embed" to "install", as this
more akin to a "make install" step.

* espefuse: Support burning ECDSA_KEY from pem file

- fix some assert check in test_espefuse.py
- add tests to cover the new functionality

* espefuse(c2): Fix BLOCK_KEY0 view for summary cmd when SB + FE keys are burnt

For C2 secure boot + flash enc block, we saw that in summary cmd
"0's" from secure boot digest part (upper 128 bit) were translated
into "?'s" when the block was read protected.
For C2, we should apply this translation for lower 128 bits only.

* fix(ESP32-C6): Fix get_pkg_version and get_{major,minor}_chip_version

* image_info: removed check that reserved bytes in image header are zero

IDF may start using parts of the reserved bytes in the extended header at any time,
which will break chip auto-detect in image_info.

* build: limit max cryptography version to 40

* fix: Set flash parameters even with --flash_size keep

Related to espressif/esp-idf#10788

Related to espressif/esp-idf#10959

* build: add arm and arm64 as build target

Closes espressif#845

* Fix typo in serial protocol docs

Fixes misspelling of `triggered` in serial protocol docs.

Signed-off-by: hasheddan <georgedanielmangum@gmail.com>

* Support more recent reedsolo packages

- https://github.com/tomerfiliba-org/reedsolomon/releases/tag/v1.6.1 - this seems to be related to licenses only.
- https://github.com/tomerfiliba-org/reedsolomon/releases/tag/v1.7.0 - this is related to installation.

Closes espressif#872

* build(arm): add pip extra url for github action build

* ci: Fix libffi symlinks for cryptography>=40

* espefuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5)

eFuse module has a hardware bug.
It is related to ESP32-C3, C6, S3, H2 chips:
    - BLOCK9 (BLOCK_KEY5) can not be used by XTS_AES keys.
For H2 chips, the BLOCK9 (BLOCK_KEY5) can not be used by ECDSA keys.
S2 does not have such a hardware bug.

* image_info: Display disabled WP pin as disabled

The image formats know about the special value 0xee used to disable WP.
Display this with image_info.

E.g.:

ESP32-C3 extended image header
==============================
WP pin: 0xee (disabled)

* image_info: Print chip ID's name if known

Example:

Flash pins drive settings: clk_drv: 0x0, q_drv: 0x0, d_drv: 0x0, cs0_drv: 0x0, hd_drv: 0x0, wp_drv: 0x0
Chip ID: 5 (ESP32-C3)
Minimal chip revision: v0.0, (legacy min_rev = 0)
Maximal chip revision: v655.35

An unknown ID will be printed as:

Chip ID: 42 (Unknown ID)

* tests: Make the testsuite Windows compatible

* espefuse: Adds external esp instance

Closes espressif#873

* espefuse: Improve efuse error viewing

* espefuse: Explicit setting of efuse time settings

EFUSE_PWR_ON_NUM in C3 has default value = 0x2880, now = 0x3000

* docs(Boot log): Add all esp targets to cover boot troubleshooting

Closes espressif#732

* fix: USB-JTAG-Serial PID detection error

* esptool: Move bootdesc on the top of the ram segment

* espefuse: Move some vars under init method to speedup tool after adding yaml support

* espefuse: Adds yaml efuse description files for all chip

- esptool: Updates eFuses wafer major&minor versions
- esptool(esp32c6): Adds package versions
- espefuse(esp32c6): Replace PKG_VERSION BLK_VERSION_MINOR BLK_VERSION_MAJOR
- espefuse(esp32c6): Adds adc calib efuses
- espefuse: Adds yaml files for Build with PyInstaller

* efuse(H2): Adds RF Calibration Information

* espsecure: Improve error message for incorrect PEM format

Closes espressif#881

* bugfix(usb_jtag_serial): Autofeed super watchdog (SWD) to avoid resets during flashing

* esptool: Read 64-bit MAC address on C6 and H2

* bugfix: Adjust wrapper scripts to not import themselves

* bugfix(espsecure): Print a clear error message if incompatible OpenSSL backend is used

Closes espressif#878

* fix: inconsistent usage of dirs separator

* feat(esptool): add option to dump whole flash based on detected size

Closes espressif#461

* Update version to v4.6

* Update version to v4.7-dev

* fix(ESP32-S3): Correct RTC WDT registers to fix resets during flashing

* Update version to v4.6.1

* Update version to v4.7-dev

* docs: add explanation for flash_id example to avoid confusion

* docs(boot-log): fix list formatting

* docs: add c2, c6 and h2 as build targets

* fix(compressed upload): Accept short data blocks with only Adler-32 bytes

* fix(CH9102F): Suggest to install new serial drivers if writing to RAM fails

* esptool & espefuse: Fix byte order in MAC (for C6 and H2)

MAC: 60:55:f9:ff:fe:f7:2c:a2 (EUI64, used for IEEE802154)
BASE MAC: 60:55:f9:f7:2c:a2 (used for BT)
MAC_EXT: ff:fe

* Update version to v4.6.2

* Update version to v4.7

* change: Add conventional precommit linter

* ci(pre-commit): Update version of `conventional-precommit-linter`

* feat(get_security_info): Improved the output format and added more
details

* fix(esp32-c2): Enable flashing in secure download mode

Closes espressif#895

* ci: Add DangerJS checks to GL and GH

* feat(esptool): Add PICO package for ESP32S3 and flash/psram efuses

* feat(esptool): Add tests for get_chip_features

* feat(esptool): Add new packages for ESP32C3 and flash efuses

* fix(expand file args): Correctly print the expanded command

* feat(espsecure): Allow prompting for HSM PIN in read_hsm_config

If hsm_config does not contain "credentials" the user will be
prompted for the HSM PIN.

This avoids the need to have HSM PINs typed in config files
which is not a good security practice.

ADJUNCT: Updated documentation to reflect new usage

Closes espressif#900

* fix(dangerGH): Update token permissions - allow Danger to add comments to PR

* fix(elf2image): fix text/rodata mapping overlap issue on uni-idrom bus chips

* fix: assert in esp32 exclusive workaround

* docs: Add other resources page

* fix(autodetection): Remove the ESP32-S2 ROM class from get_security_info autodetection

* change(pre-commit): Bump version conventional-precommit-linter to 1.2.1

* feat(esptool): added target to esp32p4

* feat(espefuse): Add support for esp32p4 chip

* fix: Fix redirection of STDOUT

Closes espressif#904

* fix(danger-github): Fir Danger GitHub token permission

* ci(danger-github): Fix github-action-bot permissions for posting Danger output

* ci: Shared danger to local stage (remove possible double CI pipelines)

* ci: add 'flake8-import-order' as a dependecy to flake8

* fix(bin_image): Check only ELF sections when searching for .flash.appdesc

Closes espressif#917

* feat(efuse): ESP32P4 adds ecdsa_key support

* feat(efuse): Update key purpose table and tests

* feat(esp32-s3): Support >16MB quad flash chips

Adds support for the W25Q256 and GD25Q256 flash chips.

Closes espressif#883

* ci(dev_release): Upload dev releases to PyPI with GH Actions

* ci: fix pipeline for building docs

* feat(merge_bin): add support for uf2 format

* feat(esp32c3): Support ECO6 and ECO7 magic numbers

* ci(gitlab_ci): Change only/except syntax to rules

* fix(flasher_stub): fix usb-serial-jtag enabled non-related intr source

* fix(loader): Could not open serial port message adjusted

* ci(gitlab): Fix deploying docs to production

* ci(github): Fix pyinstaller builds on ubuntu

* docs(basic-commands): added note for PowerShell users for merge_bin command

Closes espressif#923

* feat: Add support for Python 3.12

* feat(loader): Added hints for some serial port issues when rising port error

Closes espressif/esp-idf#12366

* feat: add support for get_security_info on esp32c3 ECO7

* docs(troubleshooting): Explain issues when flashing with USB-Serial/JTAG or USB-OTG

Closes espressif#924

* feat(espefuse): Update the way to complete the operation

* docs(boot_mode_selection): Correct secondary strapping pin boot mode levels

Closes espressif#928

* feat(espefuse): Adds efuse ADC calibration data for ESP32H2

* feat(rfc2217_server): Add hard reset sequence

* feat(elf2image): add ram-only-header argument

The ram-only-header configuration makes only
the RAM segments visible to the ROM bootloader placing
them at the beginning of the file and altering the
segment count from the image header with the quantity
of these segments, and also writing only their
checksum. This segment placement also may not result
as optimal as the standard way regarding the padding
gap use among the flash segments that could result
in a less fragmented binary.

The image built must then handle the basic hardware
initialization and the flash mapping for code execution
after ROM bootloader boot it.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
Signed-off-by: Almir Okato <almir.okato@espressif.com>

* feat(esp32p4): Stub flasher support

* refactor(stub_flasher): Cleanup, make adding new targets easier

* feat: add support for intel hex format

* feat(xip_psram): support xip psram feature on esp32p4

Expanded IROM / DROM range to include psram space as well

* Delete docs directory

* Delete .gitlab-ci.yml

* Delete .pre-commit-config.yaml

* Delete MANIFEST.in

* Update build_esptool.yml

* Delete .github/workflows/test_esptool.yml

---------

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
Signed-off-by: hasheddan <georgedanielmangum@gmail.com>
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Co-authored-by: harshal.patil <harshal.patil@espressif.com>
Co-authored-by: radim.karnis <radim.karnis@espressif.com>
Co-authored-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
Co-authored-by: Peter Dragun <peter.dragun@espressif.com>
Co-authored-by: KonstantinKondrashov <konstantin@espressif.com>
Co-authored-by: Faidon Liambotis <paravoid@debian.org>
Co-authored-by: XiNGRZ <hi@xingrz.me>
Co-authored-by: Marius Vikhammer <marius.vikhammer@espressif.com>
Co-authored-by: hasheddan <georgedanielmangum@gmail.com>
Co-authored-by: Roland Dobai <roland@espressif.com>
Co-authored-by: Trent Piepho <tpiepho@gmail.com>
Co-authored-by: Dean Gardiner <me@dgardiner.net>
Co-authored-by: Massimiliano Montagni <massimiliano@solutiontech.tech>
Co-authored-by: Tomas Sebestik <tomas.sebestik@espressif.com>
Co-authored-by: Aditya Patwardhan <aditya.patwardhan@espressif.com>
Co-authored-by: Richard Retanubun <richard.retanubun@mmbnetworks.com>
Co-authored-by: wuzhenghui <wuzhenghui@espressif.com>
Co-authored-by: Armando <douyiwen@espressif.com>
Co-authored-by: Jakub Kocka <jakub.kocka@espressif.com>
Co-authored-by: 20162026 <36726858+20162026@users.noreply.github.com>
Co-authored-by: Almir Okato <almir.okato@espressif.com>
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