Verilog basics

This repository contains some Verilog files in which DLD concepts like adders, mux, multiplier, counter, flip-flops, encoder etc. have been implemented.

Name		Name	Last commit message	Last commit date
Latest commit History 50 Commits
3-bit-binary-counter-tb.v		3-bit-binary-counter-tb.v
3-bit-binary-counter.v		3-bit-binary-counter.v
8-bit-mux.v		8-bit-mux.v
D-flip-flop.v		D-flip-flop.v
FA-using-HA.v		FA-using-HA.v
FA.v		FA.v
HA.v		HA.v
README.md		README.md
T-flip-flop-tb.v		T-flip-flop-tb.v
T-using-Dff.v		T-using-Dff.v
Tff-using-T.v		Tff-using-T.v
full-adder-tb.v		full-adder-tb.v
jc-tb.v		jc-tb.v
johnson-counter.v		johnson-counter.v
mul-tb.v		mul-tb.v
mul.v		mul.v
mux-tb.v		mux-tb.v
pr-enc-tb.v		pr-enc-tb.v
pr-enc.v		pr-enc.v

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Verilog basics

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