app :reconfig() works, might need more chip resets

src/apps/intel/intel10g.lua

@@ -528,7 +528,6 @@ function M_vf:open (opts)
 end
 
 function M_vf:close()
-   io.write(string.format('close %s - %d\n', self.pf.pciaddress, self.poolnum))
    local poolnum = self.poolnum or 0
    local pf = self.pf
    -- unset_tx_rate
@@ -553,20 +552,13 @@ function M_vf:close()
 
    self:disable_transmit()
       :disable_receive()
---    -- close transmit
---    pf.r.PFVFTE[math.floor(poolnum/32)]:clr(bits{VFTE=poolnum%32})
---    self.r.TXDCTL:clr(bits{Enable=25})
---
---    -- close receive
---    pf.r.PFVFRE[math.floor(poolnum/32)]:clr(bits{VFRE=poolnum%32})
 
    return M_sf.close(self)
 end
 
 function M_vf:reconfig(opts)
-   io.write(string.format('reconfig %s - %d\n', self.pf.pciaddress, self.poolnum))
-   self:disable_transmit()
-      :disable_receive()
+--    self:disable_transmit()
+--       :disable_receive()
 
    local poolnum = self.poolnum or 0
    local pf = self.pf
@@ -645,17 +637,17 @@ function M_vf:enable_receive()
    return self
 end
 
-function M_vf:disable_receive()
+function M_vf:disable_receive(reenable)
    self.r.RXDCTL:clr(bits{Enable=25})
-   io.write('wait !RXDCTL.Enable\n')
    self.r.RXDCTL:wait(bits{Enable=25}, 0)
    C.usleep(100)
    -- TODO free packet buffers
    self.pf.r.PFVFRE[math.floor(self.poolnum/32)]:clr(bits{VFRE=self.poolnum%32})
 
-   self.r.RXDCTL(bits{Enable=25, VME=30})
-   io.write('wait RXDCTL.Enable\n')
---    self.r.RXDCTL:wait(bits{enable=25})
+   if reenable then
+      self.r.RXDCTL(bits{Enable=25, VME=30})
+   --    self.r.RXDCTL:wait(bits{enable=25})
+   end
    return self
 end
 
@@ -678,19 +670,18 @@ function M_vf:enable_transmit()
    return self
 end
 
-function M_vf:disable_transmit()
-   io.write (string.format('TDH: %s TDT %s\n', bit.tohex(self.r.TDH()), bit.tohex(self.r.TDT())))
+function M_vf:disable_transmit(reenable)
    -- TODO: wait TDH==TDT
    -- TODO: wait all is written back: DD bit or Head_WB
    self.r.TXDCTL:clr(bits{Enable=25})
    self.r.TXDCTL:set(bits{SWFLSH=26})
-   io.write('wait !TXDCTL.Enable\n')
    self.r.TXDCTL:wait(bits{Enable=25}, 0)
    self.pf.r.PFVFTE[math.floor(self.poolnum/32)]:clr(bits{VFTE=self.poolnum%32})
 
-   self.r.TXDCTL:set(bits{Enable=25, SWFLSH=26})
-   io.write('wait TXDCTL.Enable\n')
---    self.r.TXDCTL:wait(bits{Enable=25})
+   if reenable then
+      self.r.TXDCTL:set(bits{Enable=25, SWFLSH=26})
+   --    self.r.TXDCTL:wait(bits{Enable=25})
+   end
    return self
 end
 

src/core/app.lua

@@ -145,7 +145,12 @@ function apply_config_actions (actions, conf)
    end
    function ops.reconfig (name)
       if app_table[name].reconfig then
-         app_table[name]:reconfig(config)
+         local arg = conf.apps[name].arg
+         local app = app_table[name]
+         app:reconfig(arg)
+         new_app_table[name] = app
+         table.insert(new_app_array, app)
+         app_name_to_index[name] = #new_app_array
       else
          ops.restart(name)
       end