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Create a netlistsvg skin with routing muxes and logic muxes #1
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The difference between a routing and logic mux is if the select signal is controllable via logic or are place and route time. I think doing something which shows that is probably a good idea. |
@mithro if the symbol is ok, I'll precede to create a skin for netlistsvg; but I need more information, like a yosys netlist example with some routing muxes in it (or the name of the block, inputs, and output) and where put all my work. |
@daveshah1 Could you help @wifasoi with getting the needed information? |
From Yosys's POV both a routing mux and a logic mux are the same cell type (but a routing mux will be fed from a constant - parameters are resolved to a constant before elaboration, and the logic mux from an input). Any mux will be comprised of a cascade of However, he Probably the best way forward would be to create separate Verilog models inside the |
Sounds like a good plan! |
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Logic and routing muxes should look different in the diagrams generated.
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