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Enable LOC constraints of tiles with capacity. #1230

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merged 2 commits into from Dec 16, 2019
Merged

Enable LOC constraints of tiles with capacity. #1230

merged 2 commits into from Dec 16, 2019

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litghost
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@litghost litghost commented Dec 14, 2019 •
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  • Enable mini LiteX diff fasm test and add explicit BUFG LOC.

Fixes #1183

@litghost
Enable LOC constraints of tiles with capacity.
fe36765 
- Enable mini LiteX diff fasm test and add explicit BUFG LOC.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@probot-autolabeler probot-autolabeler bot added lang-python Issue uses (or requires) Python language. lang-verilog Issue uses (or requires) Verilog language. type-utils Issues is related to the scripts inside the repo. labels Dec 14, 2019
@litghost litghost mentioned this pull request Dec 14, 2019
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@litghost
Working diff fasm test for mini LiteX.
ea1d610 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
acomodi
acomodi approved these changes Dec 16, 2019
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LGTM

@acomodi acomodi merged commit c322aa5 into f4pga:master Dec 16, 2019
@litghost litghost deleted the add_capacity_loc branch March 2, 2020 15:12
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@acomodi acomodi acomodi approved these changes

@tmichalak tmichalak Awaiting requested review from tmichalak

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lang-python Issue uses (or requires) Python language. lang-verilog Issue uses (or requires) Verilog language. type-utils Issues is related to the scripts inside the repo.
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Add capability to import tiles with capacity
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