Updated publications, changelog and code formatting.

ChangeLog

@@ -6,6 +6,7 @@ New features introduced:
 - added support to TASTE model-based design flow (https://taste.tools/). A new option has been added to activate the customized HLS flow: --experimental-setup=BAMBU-TASTE.
 - Added support for Hardware Discrepancy Analysis.  Reference paper: Pietro Fezzardi, Marco Lattuada, Fabrizio Ferrandi, Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis. ACM Trans. Embedded Comput. Syst. 16(5): 149:1-149:19 (2017).
 - Added support for OpenMP for. Reference papers:  M. Minutoli, V. G. Castellana, A. Tumeo, M. Lattuada, and F. Ferrandi, “Efficient Synthesis of Graph Methods: A Dynamically Scheduled Architecture,” in Proceedings of the 35th International Conference on Computer-Aided Design, New York, NY, USA, 2016, p. 128:1–128:8.  V. G. Castellana, M. Minutoli, A. Morari, A. Tumeo, M. Lattuada, and F. Ferrandi, “High level synthesis of RDF queries for graph analytics,” in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015, pp. 323-330. 
+- Customized Dynamic HLS flow updated. Reference paper: M. Lattuada and F. Ferrandi, "A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows", ACM Trans. Reconfigurable Technol. Syst. 12, 4, Article 19 (October 2019), 26 pages.
 - Added an initial support to C++/fortran high-level synthesis. Now, Ubuntu distributions require the installation of g++-multilib package.
 - Added support to CLANG/LLVM compiler version 4, 5, 6 and 7. On multiple files, LTO is exploited.
 - Added to CLANG/LLVM based analysis an interprocedural value range analysis based on the following paper: Fernando Magno Quintao Pereira, Raphael Ernani Rodrigues, and Victor Hugo Sperle Campos. "A fast and low-overhead technique to secure programs against integer overflows", In Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO) (CGO '13). Washington, DC, USA, 1-11.

publications.bib

@@ -1,3 +1,26 @@
+@article{TRETS2019,
+ author = {Lattuada, Marco and Ferrandi, Fabrizio},
+ title = {A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows},
+ journal = {ACM Trans. Reconfigurable Technol. Syst.},
+ issue_date = {October 2019},
+ volume = {12},
+ number = {4},
+ month = oct,
+ year = {2019},
+ issn = {1936-7406},
+ pages = {19:1--19:26},
+ articleno = {19},
+ numpages = {26},
+ url = {http://doi.acm.org/10.1145/3356475},
+ doi = {10.1145/3356475},
+ acmid = {3356475},
+ publisher = {ACM},
+ address = {New York, NY, USA},
+ keywords = {High level synthesis, compilation steps},
+ abstract={High Level Synthesis is a set of methodologies aimed at generating hardware descriptions starting from specifications written in high-level languages. While these methodologies share different elements with traditional compilation flows, there are characteristics of the addressed problem which require ad hoc management. In particular, differently from most of the traditional compilation flows, the complexity and the execution time of the High Level Synthesis techniques are much less relevant than the quality of the produced results. For this reason, fixed-point analyses, as well as successive refinement optimizations, can be accepted, provided that they can improve the quality of the generated designs. This article presents a design flow engine for the description and the execution of complex and customized synthesis flows. It supports dynamic addition of passes and dependencies, cyclic dependencies, and selective pass invalidation. Experimental results show the benefits of such type of design flows with respect to static linear design flows when applied to High Level Synthesis.},
+ pdf={https://re.public.polimi.it/retrieve/handle/11311/1114656/449320/paper.pdf}
+}
+
 @inproceedings{ASPDAC2019,
  author = {Castellana, Vito Giovanni and Minutoli, Marco and Tumeo, Antonino and Lattuada, Marco and Fezzardi, Pietro and Ferrandi, Fabrizio},
  title = {Software Defined Architectures for Data Analytics},

src/parser/vcd/vcd_parser.cpp

@@ -49,7 +49,7 @@ vcd_parser::vcd_parser(const ParameterConstRef& param) : debug_level(param->get_
 {
 }
 
-vcd_parser::vcd_trace_t vcd_parser::parse_vcd(const std::string& vcd_file_to_parse, const vcd_filter_t &selected_signals)
+vcd_parser::vcd_trace_t vcd_parser::parse_vcd(const std::string& vcd_file_to_parse, const vcd_filter_t& selected_signals)
 {
    // ---- initialization ----
    // open file

src/wrapper/treegcc/gcc_wrapper.cpp

@@ -588,9 +588,6 @@ void GccWrapper::FillTreeManager(const tree_managerRef TM, std::map<std::string,
 
    INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "Starting compilation of single files");
    bool enable_LTO = (compiler.is_clang && source_files.size() > 1);
-//#if HAVE_I386_CLANG7_COMPILER
-//   enable_LTO = enable_LTO || (GccWrapper_CompilerTarget::CT_I386_CLANG7 == Param->getOption<GccWrapper_CompilerTarget>(OPT_default_compiler));
-//#endif
    for(auto& source_file : source_files)
    {
       if(already_processed_files.find(source_file.first) != already_processed_files.end())